EPM5128LC68 vs EPM5130JC84 feature comparison

EPM5128LC68 Cypress Semiconductor

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EPM5130JC84 Altera Corporation

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Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer CYPRESS SEMICONDUCTOR CORP ALTERA CORP
Part Package Code LCC LCC
Package Description QCCJ, WQCCJ, LDCC84,1.2SQ
Pin Count 68 84
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS 128 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS
Clock Frequency-Max 33.3 MHz 33.3 MHz
JESD-30 Code S-PQCC-J68 S-CQCC-J84
Length 24.2316 mm 29.21 mm
Number of Dedicated Inputs 7 19
Number of I/O Lines 52 48
Number of Terminals 68 84
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 7 DEDICATED INPUTS, 52 I/O 19 DEDICATED INPUTS, 48 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED
Package Code QCCJ WQCCJ
Package Equivalence Code LDCC68,1.0SQ LDCC84,1.2SQ
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER CHIP CARRIER, WINDOW
Programmable Logic Type OT PLD UV PLD
Propagation Delay 55 ns 55 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.08 mm 5.08 mm
Supply Voltage-Max 5.25 V 5.25 V
Supply Voltage-Min 4.75 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Form J BEND J BEND
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position QUAD QUAD
Width 24.2316 mm 29.21 mm
Base Number Matches 2 2
Rohs Code No
In-System Programmable NO
JESD-609 Code e0
JTAG BST NO
Number of Macro Cells 128
Peak Reflow Temperature (Cel) 220
Terminal Finish TIN LEAD

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