EPM5128GI68-1
vs
EPM5128GM
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
CYPRESS SEMICONDUCTOR CORP
ALTERA CORP
Part Package Code
PGA
PGA
Package Description
WPGA,
WPGA, PGA68,11X11
Pin Count
68
68
Reach Compliance Code
unknown
unknown
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
128 MACROCELLS; 8 LABS
LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Clock Frequency-Max
62.5 MHz
33.3 MHz
JESD-30 Code
S-CPGA-P68
S-CPGA-P68
Length
27.94 mm
27.94 mm
Number of Dedicated Inputs
7
7
Number of I/O Lines
52
52
Number of Terminals
68
68
Operating Temperature-Max
85 °C
125 °C
Operating Temperature-Min
-40 °C
-55 °C
Organization
7 DEDICATED INPUTS, 52 I/O
7 DEDICATED INPUTS, 52 I/O
Output Function
MACROCELL
MACROCELL
Package Body Material
CERAMIC, METAL-SEALED COFIRED
CERAMIC, METAL-SEALED COFIRED
Package Code
WPGA
WPGA
Package Shape
SQUARE
SQUARE
Package Style
GRID ARRAY, WINDOW
GRID ARRAY, WINDOW
Programmable Logic Type
UV PLD
UV PLD
Propagation Delay
40 ns
55 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
4.953 mm
4.96 mm
Supply Voltage-Max
5.5 V
Supply Voltage-Min
4.5 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
INDUSTRIAL
MILITARY
Terminal Form
PIN/PEG
PIN/PEG
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
PERPENDICULAR
PERPENDICULAR
Width
27.94 mm
27.94 mm
Base Number Matches
2
1
Pbfree Code
Rohs Code
ECCN Code
3A001.A.2.C
In-System Programmable
NO
JESD-609 Code
e0
JTAG BST
NO
Number of Macro Cells
128
Package Equivalence Code
PGA68,11X11
Peak Reflow Temperature (Cel)
220
Terminal Finish
TIN LEAD
Compare EPM5128GI68-1 with alternatives
Compare EPM5128GM with alternatives