EP20K200EFC672
vs
EP20K200EFC672-1
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
ALTERA CORP
INTEL CORP
Part Package Code
BGA
Package Description
BGA,
FINE LINE, BGA-672
Pin Count
672
Reach Compliance Code
unknown
compliant
ECCN Code
3A991.D
3A991.D
HTS Code
8542.39.00.01
8542.39.00.01
JESD-30 Code
S-PBGA-B672
S-PBGA-B672
JESD-609 Code
e1
e0
Length
27 mm
27 mm
Number of Dedicated Inputs
4
4
Number of I/O Lines
376
376
Number of Terminals
672
672
Operating Temperature-Max
85 °C
85 °C
Operating Temperature-Min
Organization
4 DEDICATED INPUTS, 376 I/O
4 DEDICATED INPUTS, 376 I/O
Output Function
MACROCELL
MACROCELL
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
BGA
BGA
Package Equivalence Code
BGA672,26X26,40
BGA672,26X26,40
Package Shape
SQUARE
SQUARE
Package Style
GRID ARRAY
GRID ARRAY
Programmable Logic Type
LOADABLE PLD
LOADABLE PLD
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
2.1 mm
3.5 mm
Supply Voltage-Nom
1.8 V
1.8 V
Surface Mount
YES
YES
Temperature Grade
OTHER
OTHER
Terminal Finish
TIN SILVER COPPER
TIN LEAD
Terminal Form
BALL
BALL
Terminal Pitch
1 mm
1 mm
Terminal Position
BOTTOM
BOTTOM
Width
27 mm
27 mm
Base Number Matches
14
4
Rohs Code
No
Factory Lead Time
4 Weeks
Clock Frequency-Max
160 MHz
Moisture Sensitivity Level
3
Number of Inputs
368
Number of Logic Cells
8320
Number of Outputs
368
Propagation Delay
1.58 ns
Supply Voltage-Max
1.89 V
Supply Voltage-Min
1.71 V
Technology
CMOS
Compare EP20K200EFC672 with alternatives
Compare EP20K200EFC672-1 with alternatives