EP20K100FC324-2X
vs
EP20K100QC208-1N
feature comparison
| Pbfree Code |
No
|
|
| Rohs Code |
No
|
Yes
|
| Part Life Cycle Code |
Transferred
|
Obsolete
|
| Ihs Manufacturer |
ALTERA CORP
|
INTEL CORP
|
| Part Package Code |
BGA
|
|
| Package Description |
FINE LINE, BGA-324
|
FQFP,
|
| Pin Count |
324
|
|
| Reach Compliance Code |
not_compliant
|
compliant
|
| ECCN Code |
3A991.D
|
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| JESD-30 Code |
S-PBGA-B324
|
S-PQFP-G208
|
| JESD-609 Code |
e0
|
e3
|
| Length |
19 mm
|
28 mm
|
| Moisture Sensitivity Level |
3
|
3
|
| Number of Dedicated Inputs |
4
|
4
|
| Number of I/O Lines |
252
|
159
|
| Number of Inputs |
246
|
|
| Number of Logic Cells |
4160
|
|
| Number of Outputs |
246
|
|
| Number of Terminals |
324
|
208
|
| Operating Temperature-Max |
85 °C
|
85 °C
|
| Operating Temperature-Min |
|
|
| Organization |
4 DEDICATED INPUTS, 252 I/O
|
4 DEDICATED INPUTS, 159 I/O
|
| Output Function |
MACROCELL
|
MACROCELL
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
BGA
|
FQFP
|
| Package Equivalence Code |
BGA324,18X18,40
|
|
| Package Shape |
SQUARE
|
SQUARE
|
| Package Style |
GRID ARRAY
|
FLATPACK, FINE PITCH
|
| Peak Reflow Temperature (Cel) |
220
|
|
| Programmable Logic Type |
LOADABLE PLD
|
LOADABLE PLD
|
| Propagation Delay |
3 ns
|
2.5 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
3.5 mm
|
4.1 mm
|
| Supply Voltage-Max |
2.625 V
|
2.625 V
|
| Supply Voltage-Min |
2.375 V
|
2.375 V
|
| Supply Voltage-Nom |
2.5 V
|
2.5 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
OTHER
|
OTHER
|
| Terminal Finish |
TIN LEAD
|
MATTE TIN
|
| Terminal Form |
BALL
|
GULL WING
|
| Terminal Pitch |
1 mm
|
0.5 mm
|
| Terminal Position |
BOTTOM
|
QUAD
|
| Time@Peak Reflow Temperature-Max (s) |
20
|
|
| Width |
19 mm
|
28 mm
|
| Base Number Matches |
2
|
2
|
|
|
|
Compare EP20K100FC324-2X with alternatives
Compare EP20K100QC208-1N with alternatives