EDI84256LPS55L32B vs MSM4256WLMB-55 feature comparison

EDI84256LPS55L32B Electronic Designs Inc

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MSM4256WLMB-55 APTA Group Inc

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer ELECTRONIC DESIGNS INC APTA GROUP INC
Reach Compliance Code unknown unknown
Access Time-Max 55 ns 55 ns
JESD-30 Code R-CQCC-N32 R-XQCC-N32
Memory Density 1048576 bit 1048576 bit
Memory IC Type STANDARD SRAM STANDARD SRAM
Memory Width 4 4
Number of Functions 1
Number of Ports 1
Number of Terminals 32 32
Number of Words 262144 words 262144 words
Number of Words Code 256000 256000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Organization 256KX4 256KX4
Output Characteristics 3-STATE 3-STATE
Output Enable YES
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC
Package Code QCCN QCCN
Package Shape RECTANGULAR RECTANGULAR
Package Style CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL
Qualification Status Not Qualified Not Qualified
Standby Voltage-Min 2 V 2 V
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Form NO LEAD NO LEAD
Terminal Position QUAD QUAD
Base Number Matches 1 2
Rohs Code No
Package Description QCCN, LCC32,.45X.7
ECCN Code 3A001.A.2.C
HTS Code 8542.32.00.41
I/O Type COMMON
JESD-609 Code e0
Package Equivalence Code LCC32,.45X.7
Screening Level MIL-STD-883 Class B (Modified)
Standby Current-Max 0.0001 A
Supply Current-Max 0.12 mA
Terminal Finish Tin/Lead (Sn/Pb)
Terminal Pitch 1.27 mm

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