D5C032-30 vs PLDC18G8-15DMB feature comparison

D5C032-30 Intel Corporation

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PLDC18G8-15DMB Cypress Semiconductor

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEL CORP CYPRESS SEMICONDUCTOR CORP
Part Package Code DIP DIP
Package Description DIP, DIP20,.3 0.300 INCH, CERDIP-20
Pin Count 20 20
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature PAL WITH MACROCELLS; 8 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK PAL WITH MACROCELLS; 8 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Architecture PAL-TYPE PAL-TYPE
Clock Frequency-Max 25 MHz 41.6 MHz
JESD-30 Code R-GDIP-T20 R-GDIP-T20
JESD-609 Code e0 e0
Length 24.825 mm 24.13 mm
Number of Dedicated Inputs 8 8
Number of I/O Lines 8 8
Number of Inputs 18 18
Number of Outputs 8 8
Number of Product Terms 72 72
Number of Terminals 20 20
Operating Temperature-Max 70 °C 125 °C
Operating Temperature-Min -55 °C
Organization 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O
Output Function MACROCELL MACROCELL
Package Body Material CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
Package Code DIP DIP
Package Equivalence Code DIP20,.3 DIP20,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Programmable Logic Type UV PLD OT PLD
Propagation Delay 30 ns 15 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.08 mm 5.08 mm
Supply Voltage-Max 5.25 V 5.5 V
Supply Voltage-Min 4.75 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL MILITARY
Terminal Finish TIN LEAD Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 1
ECCN Code 3A001.A.2.C
Screening Level 38535Q/M;38534H;883B

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