CY7C342-35GI vs CY7C373-83JI feature comparison

CY7C342-35GI Cypress Semiconductor

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CY7C373-83JI Cypress Semiconductor

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer CYPRESS SEMICONDUCTOR CORP CYPRESS SEMICONDUCTOR CORP
Part Package Code PGA LCC
Package Description CAVITY-DOWN, CERAMIC, PGA-68 PLASTIC, LCC-84
Pin Count 68 84
Reach Compliance Code not_compliant not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK LABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
Clock Frequency-Max 22.2 MHz 62.5 MHz
In-System Programmable NO NO
JESD-30 Code S-CPGA-P68 S-PQCC-J84
JESD-609 Code e0 e0
JTAG BST NO NO
Length 27.94 mm 29.3116 mm
Number of Dedicated Inputs 7 2
Number of I/O Lines 52 64
Number of Macro Cells 128 64
Number of Terminals 68 84
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Organization 7 DEDICATED INPUTS, 52 I/O 2 DEDICATED INPUTS, 64 I/O
Output Function MACROCELL MACROCELL
Package Body Material CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY
Package Code PGA QCCJ
Package Equivalence Code PGA68,11X11 LDCC84,1.2SQ
Package Shape SQUARE SQUARE
Package Style GRID ARRAY CHIP CARRIER
Programmable Logic Type OT PLD FLASH PLD
Propagation Delay 75 ns 19 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 2.667 mm 5.08 mm
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 4.5 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Finish TIN LEAD TIN LEAD
Terminal Form PIN/PEG J BEND
Terminal Pitch 2.54 mm 1.27 mm
Terminal Position PERPENDICULAR QUAD
Width 27.94 mm 29.3116 mm
Base Number Matches 1 3

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