CY7C131-25JXCT
vs
IDT7130LA100L52
feature comparison
All Stats
Differences Only
Pbfree Code
Rohs Code
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
CYPRESS SEMICONDUCTOR CORP
INTEGRATED DEVICE TECHNOLOGY INC
Package Description
LEAD FREE, PLASTIC, LCC-52
QCCN, LCC52,.75SQ
Reach Compliance Code
unknown
not_compliant
ECCN Code
EAR99
EAR99
HTS Code
8542.32.00.41
8542.32.00.41
Access Time-Max
25 ns
100 ns
Additional Feature
INTERRUPT FLAG
INTERRUPT FLAG; AUTOMATIC POWER-DOWN
I/O Type
COMMON
COMMON
JESD-30 Code
S-PQCC-J52
S-CQCC-N52
JESD-609 Code
e3
e0
Length
19.1262 mm
19.05 mm
Memory Density
8192 bit
8192 bit
Memory IC Type
MULTI-PORT SRAM
MULTI-PORT SRAM
Memory Width
8
8
Moisture Sensitivity Level
3
Number of Functions
1
1
Number of Ports
2
2
Number of Terminals
52
52
Number of Words
1024 words
1024 words
Number of Words Code
1000
1000
Operating Mode
ASYNCHRONOUS
ASYNCHRONOUS
Operating Temperature-Max
70 °C
70 °C
Operating Temperature-Min
Organization
1KX8
1KX8
Output Characteristics
3-STATE
3-STATE
Package Body Material
PLASTIC/EPOXY
CERAMIC, METAL-SEALED COFIRED
Package Code
QCCJ
QCCN
Package Equivalence Code
LDCC52,.8SQ
LCC52,.75SQ
Package Shape
SQUARE
SQUARE
Package Style
CHIP CARRIER
CHIP CARRIER
Parallel/Serial
PARALLEL
PARALLEL
Peak Reflow Temperature (Cel)
260
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
5.08 mm
2.2098 mm
Standby Current-Max
0.015 A
0.0015 A
Standby Voltage-Min
4.5 V
2 V
Supply Current-Max
0.17 mA
0.13 mA
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL
COMMERCIAL
Terminal Finish
MATTE TIN
TIN LEAD
Terminal Form
J BEND
NO LEAD
Terminal Pitch
1.27 mm
1.27 mm
Terminal Position
QUAD
QUAD
Time@Peak Reflow Temperature-Max (s)
20
Width
19.1262 mm
19.05 mm
Base Number Matches
1
2
Part Package Code
LCC
Pin Count
52
Output Enable
YES
Compare CY7C131-25JXCT with alternatives
Compare IDT7130LA100L52 with alternatives