71V321S25JI8 vs 71421LA25JI feature comparison

71V321S25JI8 Integrated Device Technology Inc

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71421LA25JI Integrated Device Technology Inc

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Pbfree Code No No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC INTEGRATED DEVICE TECHNOLOGY INC
Reach Compliance Code not_compliant compliant
ECCN Code EAR99 EAR99
HTS Code 8542.32.00.41 8542.32.00.41
Access Time-Max 25 ns 25 ns
I/O Type COMMON COMMON
JESD-30 Code S-PQCC-J52 S-PQCC-J52
JESD-609 Code e0 e0
Memory Density 16384 bit 16384 bit
Memory IC Type MULTI-PORT SRAM MULTI-PORT SRAM
Memory Width 8 8
Moisture Sensitivity Level 1 3
Number of Ports 2 2
Number of Terminals 52 52
Number of Words 2048 words 2048 words
Number of Words Code 2000 2000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 85 °C
Operating Temperature-Min -40 °C
Organization 2KX8 2KX8
Output Characteristics 3-STATE 3-STATE
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code QCCJ QCCJ
Package Equivalence Code LDCC52,.8SQ LDCC52,.8SQ
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 225 225
Qualification Status Not Qualified Not Qualified
Standby Current-Max 0.005 A 0.004 A
Standby Voltage-Min 3 V 2 V
Supply Current-Max 0.15 mA 0.22 mA
Supply Voltage-Nom (Vsup) 3.3 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL INDUSTRIAL
Terminal Finish TIN LEAD TIN LEAD
Terminal Form J BEND J BEND
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 20 20
Base Number Matches 1 1
Part Package Code PLCC
Package Description 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52
Pin Count 52
Manufacturer Package Code PL52
Length 19.1262 mm
Number of Functions 1
Seated Height-Max 4.572 mm
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Width 19.1262 mm

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Compare 71421LA25JI with alternatives