7132LA55C vs 7132LA55PDGI feature comparison

7132LA55C Integrated Device Technology Inc

Buy Now Datasheet

7132LA55PDGI Integrated Device Technology Inc

Buy Now Datasheet
Pbfree Code No Yes
Rohs Code No Yes
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code SB PDIP
Package Description DIP-48 DIP-48
Pin Count 48 48
Manufacturer Package Code SB48 PDG48
Reach Compliance Code not_compliant compliant
ECCN Code EAR99 EAR99
HTS Code 8542.32.00.41 8542.32.00.41
Date Of Intro 1988-01-01
Access Time-Max 55 ns 55 ns
Additional Feature AUTOMATIC POWER-DOWN; BATTERY BACKUP
I/O Type COMMON
JESD-30 Code R-CDIP-T48 R-PDIP-T48
JESD-609 Code e0 e3
Length 60.96 mm
Memory Density 16384 bit 16384 bit
Memory IC Type MULTI-PORT SRAM MULTI-PORT SRAM
Memory Width 8 8
Moisture Sensitivity Level 1 1
Number of Functions 1 1
Number of Ports 2
Number of Terminals 48 48
Number of Words 2048 words 2048 words
Number of Words Code 2000 2000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 85 °C
Operating Temperature-Min -40 °C
Organization 2KX8 2KX8
Output Characteristics 3-STATE
Package Body Material CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP48,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 240 260
Qualification Status Not Qualified
Seated Height-Max 4.826 mm
Standby Current-Max 0.0015 A
Standby Voltage-Min 2 V
Supply Current-Max 0.11 mA
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL INDUSTRIAL
Terminal Finish TIN LEAD TIN
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL DUAL
Width 15.24 mm
Base Number Matches 10 1

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