71321SA55JGI
vs
IDT7142LA55LB
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Active
Obsolete
Ihs Manufacturer
RENESAS ELECTRONICS CORP
INTEGRATED DEVICE TECHNOLOGY INC
Package Description
0.750 X 0.750 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-52
QCCN,
Reach Compliance Code
compliant
compliant
Access Time-Max
55 ns
55 ns
Additional Feature
AUTOMATIC POWER DOWN
I/O Type
COMMON
JESD-30 Code
S-PQCC-J52
S-CQCC-N48
JESD-609 Code
e3
e0
Length
19.1262 mm
14.3002 mm
Memory Density
16384 bit
16384 bit
Memory IC Type
MULTI-PORT SRAM
MULTI-PORT SRAM
Memory Width
8
8
Moisture Sensitivity Level
1
Number of Functions
1
1
Number of Ports
2
2
Number of Terminals
52
48
Number of Words
2048 words
2048 words
Number of Words Code
2000
2000
Operating Mode
ASYNCHRONOUS
ASYNCHRONOUS
Operating Temperature-Max
85 °C
125 °C
Operating Temperature-Min
-40 °C
-55 °C
Organization
2KX8
2KX8
Output Characteristics
3-STATE
3-STATE
Package Body Material
PLASTIC/EPOXY
CERAMIC, METAL-SEALED COFIRED
Package Code
QCCJ
QCCN
Package Equivalence Code
LDCC52,.8SQ
Package Shape
SQUARE
SQUARE
Package Style
CHIP CARRIER
CHIP CARRIER
Parallel/Serial
PARALLEL
PARALLEL
Peak Reflow Temperature (Cel)
260
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
4.572 mm
3.048 mm
Standby Current-Max
0.03 A
Standby Voltage-Min
4.5 V
2 V
Supply Current-Max
0.19 mA
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
INDUSTRIAL
MILITARY
Terminal Finish
Matte Tin (Sn) - annealed
TIN LEAD
Terminal Form
J BEND
NO LEAD
Terminal Pitch
1.27 mm
1.016 mm
Terminal Position
QUAD
QUAD
Time@Peak Reflow Temperature-Max (s)
30
Width
19.1262 mm
14.3002 mm
Base Number Matches
1
1
Pbfree Code
Part Package Code
LCC
Pin Count
48
ECCN Code
3A001.A.2.C
HTS Code
8542.32.00.41
Output Enable
YES
Compare 71321SA55JGI with alternatives
Compare IDT7142LA55LB with alternatives