7130SA55J vs 7130L55J feature comparison

7130SA55J Integrated Device Technology Inc

Buy Now Datasheet

7130L55J Integrated Device Technology Inc

Buy Now Datasheet
Pbfree Code No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code PLCC
Package Description PLASTIC, LCC-52
Pin Count 52
Manufacturer Package Code PL52
Reach Compliance Code compliant unknown
ECCN Code EAR99 EAR99
HTS Code 8542.32.00.41 8542.32.00.41
Access Time-Max 55 ns 55 ns
I/O Type COMMON COMMON
JESD-30 Code S-PQCC-J52 S-PQCC-J52
JESD-609 Code e0 e0
Length 19.1262 mm
Memory Density 8192 bit 8192 bit
Memory IC Type MULTI-PORT SRAM MULTI-PORT SRAM
Memory Width 8 8
Moisture Sensitivity Level 3 1
Number of Functions 1
Number of Ports 2 2
Number of Terminals 52 52
Number of Words 1024 words 1024 words
Number of Words Code 1000 1000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 1KX8 1KX8
Output Characteristics 3-STATE 3-STATE
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code QCCJ QCCJ
Package Equivalence Code LDCC52,.8SQ LDCC52,.8SQ
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 225 225
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.57 mm
Standby Current-Max 0.015 A 0.0015 A
Standby Voltage-Min 4.5 V
Supply Current-Max 0.155 mA
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish TIN LEAD TIN LEAD
Terminal Form J BEND J BEND
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 20 20
Width 19.1262 mm
Base Number Matches 1 1

Compare 7130SA55J with alternatives

Compare 7130L55J with alternatives