54F538/BRA vs 74F538PC feature comparison

54F538/BRA NXP Semiconductors

Buy Now Datasheet

74F538PC Fairchild Semiconductor Corporation

Buy Now Datasheet
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer NXP SEMICONDUCTORS FAIRCHILD SEMICONDUCTOR CORP
Package Description DIP, 0.300 INCH, PLASTIC, MS-001, DIP-20
Reach Compliance Code unknown compliant
ECCN Code EAR99 EAR99
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 2 ENABLE INPUTS 4 ENABLE INPUTS
Family F/FAST F/FAST
Input Conditioning STANDARD STANDARD
JESD-30 Code R-GDIP-T20 R-PDIP-T20
Logic IC Type 3-LINE TO 8-LINE DECODER 3-LINE TO 8-LINE DECODER
Number of Functions 1 1
Number of Terminals 20 20
Operating Temperature-Max 125 °C 70 °C
Operating Temperature-Min -55 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity CONFIGURABLE CONFIGURABLE
Package Body Material CERAMIC, GLASS-SEALED PLASTIC/EPOXY
Package Code DIP DIP
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Propagation Delay (tpd) 13.5 ns 17 ns
Qualification Status Not Qualified Not Qualified
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology TTL TTL
Temperature Grade MILITARY COMMERCIAL
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Position DUAL DUAL
Base Number Matches 1 5
Rohs Code Yes
Part Package Code DIP
Pin Count 20
Length 26.075 mm
Max I(ol) 0.02 A
Package Equivalence Code DIP20,.3
Peak Reflow Temperature (Cel) NOT SPECIFIED
Power Supply Current-Max (ICC) 56 mA
Prop. Delay@Nom-Sup 17 ns
Seated Height-Max 5.08 mm
Terminal Pitch 2.54 mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 7.62 mm

Compare 54F538/BRA with alternatives

Compare 74F538PC with alternatives