Parametric results for: XC7A200T-2FF1156I under Field Programmable Gate Arrays

All Filters Combinatorial Delay of a CLB-Max JESD-30 Code JESD-609 Code Length Manufacturer Number of CLBs Number of Terminals Operating Temperature-Max Operating Temperature-Min Organization Package Body Material Package Code Package Shape Package Style Part Life Cycle Code Pbfree Code Programmable Logic Type Rohs Code Seated Height-Max Supply Voltage-Max Supply Voltage-Min Supply Voltage-Nom Surface Mount Temperature Grade Terminal Finish Terminal Form Combinatorial Delay of a CLB-Max (1)

1.05 ns 1

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S-PBGA-B1156 1

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e0 1

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35 mm 1

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Manufacturer (1)

AMD Xilinx 1

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Number of CLBs (1)

16825 1

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1156 1

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100.0 °C 1

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-40.0 °C 1

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16825 CLBS 1

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PLASTIC/EPOXY 1

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BGA 1

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Package Shape (1)

SQUARE 1

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GRID ARRAY 1

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Transferred 1

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No 1

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Programmable Logic Type (1)

FIELD PROGRAMMABLE GATE ARRAY 1

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No 1

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3.1 mm 1

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1.05 V 1

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950 mV 1

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Supply Voltage-Nom (1)

1 V 1

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YES 1

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Temperature Grade (1)

INDUSTRIAL 1

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TIN LEAD 1

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BALL 1

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