Parametric results for: SN74LVC2G74DCUT under FF/Latches

All Filters Family JESD-30 Code JESD-609 Code Length Logic IC Type Manufacturer Max Frequency@Nom-Sup Max I(ol) Moisture Sensitivity Level Number of Bits Number of Functions Number of Terminals Operating Temperature-Max Operating Temperature-Min Output Characteristics Output Polarity Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount Trigger Type Family (1)

LVC/LCX/Z 3

3 hits Apply

R-PDSO-G8 3

3 hits Apply

e3 1 e4 2

3 hits Apply

2.3 mm 3

3 hits Apply

D FLIP-FLOP 3

3 hits Apply

Manufacturer (1)

Texas Instruments 3

3 hits Apply

Max Frequency@Nom-Sup (1)

175 MHz 3

3 hits Apply

32 mA 3

3 hits Apply

1 3

3 hits Apply

Number of Bits (1)

1 3

3 hits Apply

Number of Functions (1)

1.0 3

3 hits Apply

8 3

3 hits Apply

125.0 °C 3

3 hits Apply

-40.0 °C 3

3 hits Apply

Output Characteristics (1)

3-STATE 3

3 hits Apply

COMPLEMENTARY 3

3 hits Apply

PLASTIC/EPOXY 3

3 hits Apply

Package Code (1)

VSSOP 3

3 hits Apply

TSSOP8,.12,20 3

3 hits Apply

RECTANGULAR 3

3 hits Apply

SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH 3

3 hits Apply

Prop. Delay@Nom-Sup (1)

5.9 ns 3

3 hits Apply

Propagation Delay (tpd) (1)

14.4 ns 3

3 hits Apply

Supply Voltage-Nom (Vsup) (1)

1.8 V 3

3 hits Apply

Surface Mount (1)

YES 3

3 hits Apply

Trigger Type (1)

POSITIVE EDGE 3

3 hits Apply