Parametric results for: CD4011BM under Gates

All Filters Additional Feature Family JESD-30 Code JESD-609 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Max I(ol) Moisture Sensitivity Level Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Equivalence Code Package Shape Package Style Prop. Delay@Nom-Sup Propagation Delay (tpd) Schmitt Trigger Supply Voltage-Nom (Vsup) Surface Mount

LG-MAX 1 LG_MAX 1

64 hits Apply

Family (1)

4000/14000/40000 28

64 hits Apply

R-GDFP-F14 5 R-GDIP-T14 9 R-PDIP-T14 2 R-PDSO-G14 10 R-XDFP-F14 12 R-XDIP-T14 20

64 hits Apply

e0 30 e4 9

64 hits Apply

8.65 mm 10 9.614 mm 2 19.18 mm 3 19.43 mm 8 19.939 mm 2

Min (mm) - Max (mm)

64 hits Apply

Load Capacitance (CL) (1)

50 pF 24

64 hits Apply

NAND GATE 63

64 hits Apply

Manufacturer (9)

e2v technologies 2 Fairchild Semiconductor Corporation 3 Integrated Device Technology Inc 1 Intersil Corporation 1 National Semiconductor Corporation 13 QP Semiconductor 2 Rochester Electronics LLC 2 Texas Instruments 26 Twilight Technology Inc 14

64 hits Apply

6.8 mA 5

64 hits Apply

1 10

64 hits Apply

Number of Functions (1)

4.0 42

64 hits Apply

Number of Inputs (1)

2 42

64 hits Apply

14 58

64 hits Apply

125.0 °C 60

64 hits Apply

-55.0 °C 60

64 hits Apply

CERAMIC 32 CERAMIC, GLASS-SEALED 14 PLASTIC/EPOXY 12

64 hits Apply

Package Code (3)

DFP 17 DIP 33 SOP 10

64 hits Apply

DIP14,.3 30 FL14,.3 16 SOP14,.25 9

64 hits Apply

RECTANGULAR 59

64 hits Apply

FLATPACK 17 IN-LINE 31 SMALL OUTLINE 10

64 hits Apply

Prop. Delay@Nom-Sup (2)

250 ns 15 350 ns 7

Min (ns) - Max (ns)

64 hits Apply

Propagation Delay (tpd) (3)

120 ns 11 250 ns 25 350 ns 6

Min (ns) - Max (ns)

64 hits Apply

Schmitt Trigger (1)

NO 55

64 hits Apply

Supply Voltage-Nom (Vsup) (1)

5 V 34

64 hits Apply

Surface Mount (2)

NO 31 YES 27

64 hits Apply