Parametric results for: DV4050BD under Gates

All Filters Additional Feature Family JESD-30 Code Length Load Capacitance (CL) Logic IC Type Manufacturer Number of Functions Number of Inputs Number of Terminals Operating Temperature-Max Operating Temperature-Min Package Body Material Package Code Package Shape Package Style Propagation Delay (tpd) Supply Voltage-Nom (Vsup) Surface Mount

CMOS-TTL LEVEL TRANSLATOR 1

1 hit Apply

Family (1)

4000/14000/40000 1

1 hit Apply

R-PDSO-G16 1

1 hit Apply

9.9 mm 1

1 hit Apply

Load Capacitance (CL) (1)

50 pF 1

1 hit Apply

BUFFER 1

1 hit Apply

Manufacturer (1)

avg Semiconductors 1

1 hit Apply

Number of Functions (1)

6.0 1

1 hit Apply

Number of Inputs (1)

1 1

1 hit Apply

16 1

1 hit Apply

85.0 °C 1

1 hit Apply

-40.0 °C 1

1 hit Apply

PLASTIC/EPOXY 1

1 hit Apply

Package Code (1)

SOP 1

1 hit Apply

RECTANGULAR 1

1 hit Apply

SMALL OUTLINE 1

1 hit Apply

Propagation Delay (tpd) (1)

140 ns 1

1 hit Apply

Supply Voltage-Nom (Vsup) (1)

5 V 1

1 hit Apply

Surface Mount (1)

YES 1

1 hit Apply