Datasheets
XCZU47DR-2FSVG1517I by:
AMD
AMD
AMD Xilinx
Not Found

CMOS, PBGA1517,

Part Details for XCZU47DR-2FSVG1517I by AMD

Results Overview of XCZU47DR-2FSVG1517I by AMD

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XCZU47DR-2FSVG1517I Information

XCZU47DR-2FSVG1517I by AMD is an Other uP/uC/Peripheral IC.
Other uPs/uCs/Peripheral ICs are under the broader part category of Microcontrollers and Processors.

Microcontrollers (MCUs) are small, low-power integrated circuits used to control embedded systems. Microcontrollers are primarily used to automate and control devices. Read more about Microcontrollers and Processors on our Microcontrollers and Processors part category page.

Price & Stock for XCZU47DR-2FSVG1517I

Part # Distributor Description Stock Price Buy
DISTI # 122-XCZU47DR-2FSVG1517I-ND
DigiKey IC ZUP RFSOC A53 FPGA 1517BGA Min Qty: 1 Lead time: 16 Weeks Container: Tray Temporarily Out of Stock
  • 1 $29,203.7500
$29,203.7500 Buy Now
DISTI # XCZU47DR-2FSVG1517I
Avnet Americas SoC 64-Bit ARM Cortex-A53/ARM Cortex-R5 RISC 1333MHz/533MHz 6Core 1517-Pin FCBGA - Trays (Alt: XCZU4... 7DR-2FSVG1517I) more RoHS: Compliant Min Qty: 1 Package Multiple: 1 Lead time: 16 Weeks, 0 Days Container: Tray 0
RFQ
DISTI # XCZU47DR-2FSVG1517I
Avnet Silica SoC 64Bit ARM CortexA53ARM CortexR5 RISC 1333MHz533MHz 6Core 1517Pin FCBGA (Alt: XCZU47DR-2FSVG1517I... ) more RoHS: Compliant Min Qty: 1 Package Multiple: 21 Lead time: 17 Weeks, 0 Days Silica - 0
Buy Now
DISTI # XCZU47DR-2FSVG1517I
EBV Elektronik SoC 64Bit ARM CortexA53ARM CortexR5 RISC 1333MHz533MHz 6Core 1517Pin FCBGA (Alt: XCZU47DR-2FSVG1517I... ) more RoHS: Compliant Min Qty: 1 Package Multiple: 21 Lead time: 18 Weeks, 0 Days EBV - 0
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Part Details for XCZU47DR-2FSVG1517I

XCZU47DR-2FSVG1517I CAD Models

XCZU47DR-2FSVG1517I Part Data Attributes

XCZU47DR-2FSVG1517I AMD
Buy Now Datasheet
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XCZU47DR-2FSVG1517I AMD CMOS, PBGA1517,
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Rohs Code Yes
Part Life Cycle Code Active
Ihs Manufacturer ADVANCED MICRO DEVICES INC
Reach Compliance Code compliant
Factory Lead Time 16 Weeks
Samacsys Manufacturer AMD
JESD-30 Code R-PBGA-B1517
JESD-609 Code e1
Moisture Sensitivity Level 4
Number of Terminals 1517
Operating Temperature-Max 100 °C
Operating Temperature-Min -40 °C
Package Body Material PLASTIC/EPOXY
Package Code BGA
Package Shape RECTANGULAR
Package Style GRID ARRAY
Peak Reflow Temperature (Cel) 240
Supply Voltage-Max 0.876 V
Supply Voltage-Min 0.825 V
Supply Voltage-Nom 0.85 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)
Terminal Form BALL
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30
uPs/uCs/Peripheral ICs Type RFSOC

XCZU47DR-2FSVG1517I Frequently Asked Questions (FAQ)

  • AMD provides a PCB design guide and layout recommendations in their documentation, including the Xilinx PCB Design Guide (UG583) and the Zynq UltraScale+ PCB Design and Pin Planning Guide (UG583). Additionally, AMD offers a PCB layout review service to ensure optimal signal integrity.

  • AMD provides power estimation and thermal management guidelines in their documentation, including the Xilinx Power Estimator (XPE) tool and the Zynq UltraScale+ Power Management Guide (UG583). Engineers can also use the AMD-provided thermal models and simulation tools to optimize their design.

  • AMD provides clocking and reset guidelines in their documentation, including the Xilinx Clocking Wizard (UG472) and the Zynq UltraScale+ Clocking and Reset Guide (UG583). Engineers should follow these guidelines to ensure proper clock domain crossing and reset synchronization.

  • AMD provides secure boot and firmware authentication guidelines in their documentation, including the Xilinx Secure Boot and Authentication Guide (UG583). Engineers can use the AMD-provided secure boot mechanisms, such as the Boot Header and Authentication Protocol (BHAP), to ensure the authenticity and integrity of their firmware.

  • AMD provides documentation on the integrated processors, including the Zynq UltraScale+ Processing System Technical Reference Manual (UG583) and the ARM Cortex-A53 and R5 processor documentation. Engineers should be aware of the processing system's limitations, such as cache coherence and memory access, and consider these factors when designing their system.