Part Details for SI53112-A03AGMR by Silicon Laboratories Inc
Overview of SI53112-A03AGMR by Silicon Laboratories Inc
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Part Details for SI53112-A03AGMR
SI53112-A03AGMR CAD Models
SI53112-A03AGMR Part Data Attributes:
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SI53112-A03AGMR
Silicon Laboratories Inc
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SI53112-A03AGMR
Silicon Laboratories Inc
PLL Based Clock Driver, 53112 Series, 24 True Output(s), 0 Inverted Output(s), LEAD FREE, MO-220, QFN-64
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| Rohs Code | Yes | |
| Part Life Cycle Code | Transferred | |
| Ihs Manufacturer | SILICON LABORATORIES INC | |
| Package Description | LEAD FREE, MO-220, QFN-64 | |
| Reach Compliance Code | compliant | |
| HTS Code | 8542.39.00.01 | |
| Family | 53112 | |
| Input Conditioning | DIFFERENTIAL MUX | |
| JESD-30 Code | S-XQCC-N64 | |
| JESD-609 Code | e3 | |
| Length | 9 mm | |
| Logic IC Type | PLL BASED CLOCK DRIVER | |
| Moisture Sensitivity Level | 2 | |
| Number of Functions | 1 | |
| Number of Inverted Outputs | ||
| Number of Terminals | 64 | |
| Number of True Outputs | 24 | |
| Operating Temperature-Max | 85 °C | |
| Operating Temperature-Min | -40 °C | |
| Output Characteristics | 3-STATE | |
| Package Body Material | UNSPECIFIED | |
| Package Code | HVQCCN | |
| Package Shape | SQUARE | |
| Package Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE | |
| Peak Reflow Temperature (Cel) | 260 | |
| Propagation Delay (tpd) | 4.5 ns | |
| Same Edge Skew-Max (tskwd) | 0.05 ns | |
| Seated Height-Max | 0.95 mm | |
| Supply Voltage-Max (Vsup) | 3.465 V | |
| Supply Voltage-Min (Vsup) | 3.135 V | |
| Supply Voltage-Nom (Vsup) | 3.3 V | |
| Surface Mount | YES | |
| Temperature Grade | INDUSTRIAL | |
| Terminal Finish | MATTE TIN | |
| Terminal Form | NO LEAD | |
| Terminal Pitch | 0.5 mm | |
| Terminal Position | QUAD | |
| Time@Peak Reflow Temperature-Max (s) | 40 | |
| Width | 9 mm |