Part Details for LP2980 by National Semiconductor Corporation
Overview of LP2980 by National Semiconductor Corporation
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Part Details for LP2980
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Reference Designs related to LP2980
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The PMP10600.1 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules: LDOs: and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
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PMP4373 采用低成本 BJT 解放方案的 5V1A 低待机功耗的交流充电器
This reference design demostrates a low cost single PCB board solution for 5V1A adapter. By using primary side regulation (PSR) mode chip UCC28720 which drives bipolar power device, average efficiency is 76%@115V and 77%@230Vac. PMP4373 achieves high precise CC and CV regulation with 0.15V cable compensation The overall size is limited in 35.7mm(L)* 25.7mm(W)*14mm(H) and no load power is less than 10mW. The design is done with single PCB layer.
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Xilinx® Zynq® 7000 series (XC7Z015) Power Solution: 8W - Reference Design
The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules: LDOs: and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
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PMP20634 参考设计是一种隔离式 DCM 反激设计,可提供 85V 到 265V 的通用交流线路输入,并产生一个能承受 12W 负载的 12V 输出。该设计使用 UCC28730 控制器,可在无负载的情况下实现超低待机功耗。它可在高压和低压线路中实现 85% 的效率,在 2 层电路板上的尺寸为 1 x 3 英寸。
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1 - 5 of 10 reference designs