Datasheets
LC4384B-75FN256C by:

EE PLD, 7.5ns, 384-Cell, CMOS, PBGA256, FPBGA-256

Part Details for LC4384B-75FN256C by Lattice Semiconductor Corporation

Overview of LC4384B-75FN256C by Lattice Semiconductor Corporation

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Applications Computing and Data Storage

Price & Stock for LC4384B-75FN256C

Part # Distributor Description Stock Price Buy
DISTI # 2156-LC4384B-75FN256C-ND
DigiKey IC CPLD 384MC 7.5NS 256FPBGA Min Qty: 8 Lead time: 1 Weeks Container: Bulk MARKETPLACE PRODUCT 51
In Stock
  • 8 $42.0400
$42.0400 Buy Now
DISTI # 86124000
Verical LC4384B-75FN256C Min Qty: 8 Package Multiple: 1 Date Code: 0601 Americas - 51
  • 8 $50.5250
  • 25 $49.5125
  • 100 $47.4875
  • 500 $45.4750
  • 1,000 $42.9500
$42.9500 / $50.5250 Buy Now
Rochester Electronics EE PLD, 7.5ns, 384-Cell PBGA256 RoHS: Compliant Status: Obsolete Min Qty: 1 51
  • 1 $40.4200
  • 25 $39.6100
  • 100 $37.9900
  • 500 $36.3800
  • 1,000 $34.3600
$34.3600 / $40.4200 Buy Now

Part Details for LC4384B-75FN256C

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LC4384B-75FN256C Part Data Attributes

LC4384B-75FN256C Lattice Semiconductor Corporation
Buy Now Datasheet
Compare Parts:
LC4384B-75FN256C Lattice Semiconductor Corporation EE PLD, 7.5ns, 384-Cell, CMOS, PBGA256, FPBGA-256
Rohs Code Yes
Part Life Cycle Code Obsolete
Ihs Manufacturer LATTICE SEMICONDUCTOR CORP
Part Package Code BGA
Package Description FPBGA-256
Pin Count 256
Reach Compliance Code compliant
HTS Code 8542.39.00.01
Samacsys Manufacturer Lattice Semiconductor
Architecture PAD-TYPE
Clock Frequency-Max 111 MHz
In-System Programmable YES
JESD-30 Code S-PBGA-B256
JESD-609 Code e1
JTAG BST YES
Length 17 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 4
Number of I/O Lines 192
Number of Inputs 196
Number of Macro Cells 384
Number of Outputs 192
Number of Product Terms 83
Number of Terminals 256
Operating Temperature-Max 90 °C
Operating Temperature-Min
Organization 4 DEDICATED INPUTS, 192 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code BGA
Package Equivalence Code BGA256,16X16,40
Package Shape SQUARE
Package Style GRID ARRAY
Peak Reflow Temperature (Cel) 250
Programmable Logic Type EE PLD
Propagation Delay 7.5 ns
Qualification Status Not Qualified
Seated Height-Max 2.1 mm
Supply Voltage-Max 2.7 V
Supply Voltage-Min 2.3 V
Supply Voltage-Nom 2.5 V
Surface Mount YES
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
Terminal Form BALL
Terminal Pitch 1 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 40
Width 17 mm

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