Datasheets
LC4064V-75T100C by: Lattice Semiconductor Corporation

EE PLD, 7.5ns, 64-Cell, CMOS, PQFP100, TQFP-100

Part Details for LC4064V-75T100C by Lattice Semiconductor Corporation

Results Overview of LC4064V-75T100C by Lattice Semiconductor Corporation

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LC4064V-75T100C Information

LC4064V-75T100C by Lattice Semiconductor Corporation is a Programmable Logic Device.
Programmable Logic Devices are under the broader part category of Programmable Logic Devices.

Programmable Logic Devices (PLDs) are reconfigurable digital components that can be customized for different applications, offering flexibility and improved performance over fixed logic devices. Read more about Programmable Logic Devices on our Programmable Logic part category page.

Price & Stock for LC4064V-75T100C

Part # Distributor Description Stock Price Buy
Bristol Electronics   129
RFQ
Quest Components   9
  • 1 $13.0320
  • 3 $9.5568
  • 9 $8.6880
$8.6880 / $13.0320 Buy Now
Quest Components   3
  • 1 $10.8600
  • 2 $9.0500
  • 4 $7.9640
$7.9640 / $10.8600 Buy Now

Part Details for LC4064V-75T100C

LC4064V-75T100C CAD Models

LC4064V-75T100C Part Data Attributes

LC4064V-75T100C Lattice Semiconductor Corporation
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LC4064V-75T100C Lattice Semiconductor Corporation EE PLD, 7.5ns, 64-Cell, CMOS, PQFP100, TQFP-100
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Pbfree Code No
Rohs Code No
Part Life Cycle Code Obsolete
Ihs Manufacturer LATTICE SEMICONDUCTOR CORP
Part Package Code QFP
Package Description TQFP-100
Pin Count 100
Reach Compliance Code not_compliant
ECCN Code EAR99
HTS Code 8542.39.00.01
Samacsys Manufacturer Lattice Semiconductor
Architecture PAD-TYPE
Clock Frequency-Max 111 MHz
In-System Programmable YES
JESD-30 Code S-PQFP-G100
JESD-609 Code e0
JTAG BST YES
Length 14 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 10
Number of I/O Lines 64
Number of Inputs 74
Number of Macro Cells 64
Number of Outputs 64
Number of Product Terms 83
Number of Terminals 100
Operating Temperature-Max 90 °C
Operating Temperature-Min
Organization 10 DEDICATED INPUTS, 64 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code LFQFP
Package Equivalence Code QFP100,.63SQ,20
Package Shape SQUARE
Package Style FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Cel) 240
Programmable Logic Type EE PLD
Propagation Delay 7.5 ns
Qualification Status Not Qualified
Seated Height-Max 1.6 mm
Supply Voltage-Max 3.6 V
Supply Voltage-Min 3 V
Supply Voltage-Nom 3.3 V
Surface Mount YES
Terminal Finish TIN LEAD
Terminal Form GULL WING
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Width 14 mm

LC4064V-75T100C Related Parts

LC4064V-75T100C Frequently Asked Questions (FAQ)

  • The recommended power-up sequence is to apply VCC first, followed by VCCIO, and then the input signals. This ensures that the device powers up correctly and minimizes the risk of latch-up or damage.

  • Unused inputs should be tied to a valid logic level (either VCC or GND) to prevent floating inputs, which can cause increased power consumption and noise. It's recommended to use a pull-up or pull-down resistor to tie the unused inputs to a valid logic level.

  • The maximum frequency of operation for the LC4064V-75T100C is 100 MHz. However, the actual operating frequency may be limited by the system design, PCB layout, and signal integrity considerations.

  • Yes, the LC4064V-75T100C is compatible with 3.3V systems. The device is specified to operate from 2.5V to 3.6V, making it suitable for use in 3.3V systems. However, ensure that the input signals and output loads are compatible with the 3.3V voltage level.

  • The power consumption of the LC4064V-75T100C can be estimated using the datasheet specifications for ICC (static current) and ICCD (dynamic current). The actual power consumption will depend on the system design, operating frequency, and input signal activity. It's recommended to use the Lattice Semiconductor Power Calculator tool to estimate the power consumption.