Part Details for IDT74LVC112APG by Integrated Device Technology Inc
Overview of IDT74LVC112APG by Integrated Device Technology Inc
- Distributor Offerings: (1 listing)
- Number of FFF Equivalents: (10 replacements)
- CAD Models: (Request Part)
- Number of Functional Equivalents: (10 options)
- Part Data Attributes: (Available)
- Reference Designs: (Not Available)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
Applications
Telecommunications
Price & Stock for IDT74LVC112APG
| Part # | Distributor | Description | Stock | Price | Buy | |
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Quest Components | 3176 |
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$0.2366 / $0.9100 | Buy Now |
Part Details for IDT74LVC112APG
IDT74LVC112APG CAD Models
IDT74LVC112APG Part Data Attributes
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IDT74LVC112APG
Integrated Device Technology Inc
Buy Now
Datasheet
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Compare Parts:
IDT74LVC112APG
Integrated Device Technology Inc
J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, TSSOP-16
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| Rohs Code | No | |
| Part Life Cycle Code | Obsolete | |
| Ihs Manufacturer | INTEGRATED DEVICE TECHNOLOGY INC | |
| Part Package Code | TSSOP | |
| Package Description | TSSOP, TSSOP16,.25 | |
| Pin Count | 16 | |
| Reach Compliance Code | not_compliant | |
| HTS Code | 8542.39.00.01 | |
| Family | LVC/LCX/Z | |
| JESD-30 Code | R-PDSO-G16 | |
| JESD-609 Code | e0 | |
| Length | 5 mm | |
| Load Capacitance (CL) | 50 pF | |
| Logic IC Type | J-K FLIP-FLOP | |
| Max Frequency@Nom-Sup | 150000000 Hz | |
| Max I(ol) | 0.024 A | |
| Moisture Sensitivity Level | 1 | |
| Number of Bits | 2 | |
| Number of Functions | 2 | |
| Number of Terminals | 16 | |
| Operating Temperature-Max | 85 °C | |
| Operating Temperature-Min | -40 °C | |
| Output Characteristics | 3-STATE | |
| Output Polarity | COMPLEMENTARY | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | TSSOP | |
| Package Equivalence Code | TSSOP16,.25 | |
| Package Shape | RECTANGULAR | |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
| Peak Reflow Temperature (Cel) | 240 | |
| Prop. Delay@Nom-Sup | 5.9 ns | |
| Propagation Delay (tpd) | 7.1 ns | |
| Qualification Status | Not Qualified | |
| Seated Height-Max | 1.2 mm | |
| Supply Voltage-Max (Vsup) | 3.6 V | |
| Supply Voltage-Min (Vsup) | 2.7 V | |
| Supply Voltage-Nom (Vsup) | 3.3 V | |
| Surface Mount | YES | |
| Technology | CMOS | |
| Temperature Grade | INDUSTRIAL | |
| Terminal Finish | Tin/Lead (Sn85Pb15) | |
| Terminal Form | GULL WING | |
| Terminal Pitch | 0.65 mm | |
| Terminal Position | DUAL | |
| Time@Peak Reflow Temperature-Max (s) | 20 | |
| Trigger Type | NEGATIVE EDGE | |
| Width | 4.4 mm | |
| fmax-Min | 150 MHz |
Alternate Parts for IDT74LVC112APG
This table gives cross-reference parts and alternative options found for IDT74LVC112APG. The Form Fit Function (FFF) tab will give you the options that are more likely to serve as direct pin-to-pin alternates or drop-in parts. The Functional Equivalents tab will give you options that are likely to match the same function of IDT74LVC112APG, but it may not fit your design. Always verify details of parts you are evaluating, as these parts are offered as suggestions for what you are looking for and are not guaranteed.
| Part Number | Description | Manufacturer | Compare |
|---|---|---|---|
| SN74LVC112APWRE4 | Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TSSOP -40 to 125 | Texas Instruments | IDT74LVC112APG vs SN74LVC112APWRE4 |
| SN74LVC112APWTE4 | LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, GREEN, PLASTIC, TSSOP-16 | Texas Instruments | IDT74LVC112APG vs SN74LVC112APWTE4 |
| SN74LVC112APWG4 | LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, GREEN, PLASTIC, MO-153, TSSOP-16 | Texas Instruments | IDT74LVC112APG vs SN74LVC112APWG4 |
| IDT74LVC112APGG8 | J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, TSSOP-16 | Integrated Device Technology Inc | IDT74LVC112APG vs IDT74LVC112APGG8 |
| SN74LVC112PW | LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 | Texas Instruments | IDT74LVC112APG vs SN74LVC112PW |
| SN74LVC112APWTG4 | Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TSSOP -40 to 85 | Texas Instruments | IDT74LVC112APG vs SN74LVC112APWTG4 |
| 74LCX112MTCX | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs, TSSOP-16, 2500-REEL | onsemi | IDT74LVC112APG vs 74LCX112MTCX |
| 74LCX112MTCX_NL | J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, 4.40 MM, MO-153, TSSOP-16 | Fairchild Semiconductor Corporation | IDT74LVC112APG vs 74LCX112MTCX_NL |
| 74LCX112MTC | Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs, TSSOP-16, 2350-TUBE | onsemi | IDT74LVC112APG vs 74LCX112MTC |
| 74LCX112MTC | J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, 4.40 MM, MO-153, TSSOP-16 | Fairchild Semiconductor Corporation | IDT74LVC112APG vs 74LCX112MTC |