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14-Bit, 80 MSPS/155 MSPS, 1.8 V Serial Output Analog-to-Digital Converter (ADC)
Tip: Data for a part may vary between manufacturers. You can filter for manufacturers on the top of the page next to the part image and part number.
AD9641BCPZ-155 by Analog Devices Inc is an Analog to Digital Converter.
Analog to Digital Converters are under the broader part category of Converters.
A converter is an electrical circuit that transforms electric energy into a different form that will support a elecrical load needed by a device. Read more about Converters on our Converters part category page.
Part # | Distributor | Description | Stock | Price | Buy | |
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DISTI #
2156-AD9641BCPZ-155-ND
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DigiKey | IC ADC 14BIT PIPELINED 32LFCSP Min Qty: 5 Lead time: 20 Weeks Container: Bulk MARKETPLACE PRODUCT |
4340 In Stock |
|
$67.4100 | Buy Now |
DISTI #
AD9641BCPZ-155-ND
|
DigiKey | IC ADC 14BIT PIPELINED 32LFCSP Min Qty: 5 Lead time: 20 Weeks Container: Tray | Temporarily Out of Stock |
|
$61.7380 | Buy Now |
DISTI #
584-AD9641BCPZ-155
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Mouser Electronics | Analog to Digital Converters - ADC 14Bit 155Msps ADC w/JESD204A RoHS: Compliant | 0 |
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$61.7400 / $85.2000 | Order Now |
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Analog Devices Inc | 14Bit 155Msps ADC w/JESD204A Package Multiple: 1 | 2653 |
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$45.8400 / $75.5000 | Buy Now |
DISTI #
26925284
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Verical | 1-Channel Single ADC Pipelined 155Msps 14-bit Serial 32-Pin LFCSP EP Tray RoHS: Compliant Min Qty: 10 Package Multiple: 10 | Americas - 2640 |
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$62.1258 | Buy Now |
DISTI #
15961296
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Verical | 1-Channel Single ADC Pipelined 155Msps 14-bit Serial 32-Pin LFCSP EP Tray RoHS: Compliant Min Qty: 4 Package Multiple: 4 | Americas - 4 |
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$57.1100 | Buy Now |
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Rochester Electronics | ADC, Flash Method, 14-Bit, 1 Channel, Serial Access, CMOS RoHS: Compliant Status: Active Min Qty: 1 | 4340 |
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$51.8600 / $64.8200 | Buy Now |
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AD9641BCPZ-155
Analog Devices Inc
Buy Now
Datasheet
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Compare Parts:
AD9641BCPZ-155
Analog Devices Inc
14-Bit, 80 MSPS/155 MSPS, 1.8 V Serial Output Analog-to-Digital Converter (ADC)
Select a part to compare: |
Pbfree Code | No | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Ihs Manufacturer | ANALOG DEVICES INC | |
Part Package Code | QFN | |
Package Description | 5 X 5 MM, ROHS COMPLIANT, MO-220WHHD-5, LFCSP-32 | |
Pin Count | 32 | |
Manufacturer Package Code | CP-32-12 | |
Reach Compliance Code | compliant | |
ECCN Code | 3A991.C.3 | |
HTS Code | 8542.39.00.01 | |
Samacsys Manufacturer | Analog Devices | |
Analog Input Voltage-Max | 2.087 V | |
Analog Input Voltage-Min | -2.087 V | |
Conversion Time-Max | 0.0064 µs | |
Converter Type | ADC, FLASH METHOD | |
JESD-30 Code | S-XQCC-N32 | |
JESD-609 Code | e3 | |
Length | 5 mm | |
Linearity Error-Max (EL) | 0.0073% | |
Moisture Sensitivity Level | 3 | |
Number of Analog In Channels | 1 | |
Number of Bits | 14 | |
Number of Functions | 1 | |
Number of Terminals | 32 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Output Bit Code | OFFSET BINARY, 2'S COMPLEMENT BINARY, GRAY CODE | |
Output Format | SERIAL | |
Package Body Material | UNSPECIFIED | |
Package Code | HVQCCN | |
Package Equivalence Code | LCC32,.2SQ,20 | |
Package Shape | SQUARE | |
Package Style | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE | |
Peak Reflow Temperature (Cel) | 260 | |
Qualification Status | Not Qualified | |
Sample Rate | 155 MHz | |
Sample and Hold / Track and Hold | SAMPLE | |
Seated Height-Max | 0.8 mm | |
Supply Voltage-Nom | 1.8 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | INDUSTRIAL | |
Terminal Finish | Matte Tin (Sn) | |
Terminal Form | NO LEAD | |
Terminal Pitch | 0.5 mm | |
Terminal Position | QUAD | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 5 mm |
A 4-layer PCB with a solid ground plane and a separate analog and digital power plane is recommended. Keep the analog and digital signals separate and avoid crossing them over each other. Use a common mode filter and a low-pass filter to reduce noise.
Use a low-jitter clock source (<100 ps) and a 50-ohm transmission line to drive the clock input. Ensure the clock signal is clean and free of noise. Use a clock buffer or a clock generator with a low phase noise to improve performance.
Power up the analog supply (AVDD) first, followed by the digital supply (DVDD). Ensure the analog supply is stable before applying the digital supply. Use a power-up sequence controller or a power management IC to ensure a controlled power-up sequence.
Use a FIFO or a buffer to handle the high-speed output data from the AD9641BCPZ-155. Ensure the receiving device can handle the data rate and format. Use a deserializer or a data converter to convert the parallel data to a serial format if necessary.
Perform a full-scale calibration after power-up and after any changes to the analog input. Use the CAL pin to initiate calibration. Ensure the analog input is within the specified range during calibration. Refer to the datasheet for the recommended calibration procedure.