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Ultra Low Power Programmable Main Clock for VIA VX900 Chipset, TSSOP39/Tube
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Part # | Manufacturer | Description | Datasheet |
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9UM709BGLF | Renesas Electronics Corporation | Ultra Low Power Programmable Main Clock for VIA VX900 Chipset | |
9UM709BGLFT | Renesas Electronics Corporation | Ultra Low Power Programmable Main Clock for VIA VX900 Chipset |
Part # | Distributor | Description | Stock | Price | Buy | |
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Flip Electronics | Stock | 3230 |
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9UM709BGLF
Renesas Electronics Corporation
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Datasheet
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9UM709BGLF
Renesas Electronics Corporation
Ultra Low Power Programmable Main Clock for VIA VX900 Chipset, TSSOP39/Tube
|
Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Obsolete | |
Ihs Manufacturer | RENESAS ELECTRONICS CORP | |
Part Package Code | TSSOP | |
Package Description | TSSOP-48 | |
Pin Count | 48 | |
Manufacturer Package Code | PAG48 | |
Reach Compliance Code | compliant | |
ECCN Code | NLR | |
HTS Code | 8542390001 | |
Samacsys Manufacturer | Renesas Electronics | |
Additional Feature | ALSO OPERTES AT 3.3V SUPPLY | |
JESD-30 Code | R-PDSO-G48 | |
JESD-609 Code | e3 | |
Length | 12.5 mm | |
Moisture Sensitivity Level | 1 | |
Number of Terminals | 48 | |
Operating Temperature-Max | 70 °C | |
Operating Temperature-Min | ||
Output Clock Frequency-Max | 293.33 MHz | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | TSSOP | |
Package Equivalence Code | TSSOP48,.3,20 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | |
Peak Reflow Temperature (Cel) | 260 | |
Primary Clock/Crystal Frequency-Nom | 15 MHz | |
Seated Height-Max | 1.2 mm | |
Supply Current-Max | 58 mA | |
Supply Voltage-Max | 1.575 V | |
Supply Voltage-Min | 1.425 V | |
Supply Voltage-Nom | 1.5 V | |
Surface Mount | YES | |
Technology | CMOS | |
Terminal Finish | MATTE TIN | |
Terminal Form | GULL WING | |
Terminal Pitch | 0.5 mm | |
Terminal Position | DUAL | |
Width | 6.1 mm | |
uPs/uCs/Peripheral ICs Type | CLOCK GENERATOR, PROCESSOR SPECIFIC |