Part Details for 74AUP2G132GD by NXP Semiconductors
Overview of 74AUP2G132GD by NXP Semiconductors
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- Part Data Attributes: (Available)
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Applications
Environmental Monitoring
Industrial Automation
Financial Technology (Fintech)
Part Details for 74AUP2G132GD
74AUP2G132GD CAD Models
74AUP2G132GD Part Data Attributes
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74AUP2G132GD
NXP Semiconductors
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Datasheet
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74AUP2G132GD
NXP Semiconductors
IC AUP/ULP/V SERIES, DUAL 2-INPUT NAND GATE, PDSO8, 3 X 2 MM, 0.50 MM HEIGHT, PLASTIC, SOT996-2, SON-8, Gate
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Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Transferred | |
Ihs Manufacturer | NXP SEMICONDUCTORS | |
Part Package Code | SON | |
Package Description | VSON, SOLCC8,.11,20 | |
Pin Count | 8 | |
Reach Compliance Code | compliant | |
HTS Code | 8542.39.00.01 | |
Family | AUP/ULP/V | |
JESD-30 Code | R-PDSO-N8 | |
JESD-609 Code | e4 | |
Length | 3 mm | |
Load Capacitance (CL) | 30 pF | |
Logic IC Type | NAND GATE | |
Max I(ol) | 0.0017 A | |
Moisture Sensitivity Level | 1 | |
Number of Functions | 2 | |
Number of Inputs | 2 | |
Number of Terminals | 8 | |
Operating Temperature-Max | 125 °C | |
Operating Temperature-Min | -40 °C | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | VSON | |
Package Equivalence Code | SOLCC8,.11,20 | |
Package Shape | RECTANGULAR | |
Package Style | SMALL OUTLINE, VERY THIN PROFILE | |
Packing Method | TR | |
Peak Reflow Temperature (Cel) | 260 | |
Prop. Delay@Nom-Sup | 27.9 ns | |
Propagation Delay (tpd) | 27.9 ns | |
Qualification Status | Not Qualified | |
Schmitt Trigger | YES | |
Seated Height-Max | 0.5 mm | |
Supply Voltage-Max (Vsup) | 3.6 V | |
Supply Voltage-Min (Vsup) | 0.8 V | |
Supply Voltage-Nom (Vsup) | 1.1 V | |
Surface Mount | YES | |
Technology | CMOS | |
Temperature Grade | AUTOMOTIVE | |
Terminal Finish | Nickel/Palladium/Gold (Ni/Pd/Au) | |
Terminal Form | NO LEAD | |
Terminal Pitch | 0.5 mm | |
Terminal Position | DUAL | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Width | 2 mm |