Logic
74AHCT138D-Q100J
Description: 74AHC(T)138-Q100 - 3-to-8 line decoder/demultiplexer; inverting SOP 16-Pin

Overview of 74AHCT138D-Q100J by NXP Semiconductors

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  • Part Data Attributes ( Available )
  • Reference Designs: ( Not Available )

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Part Data Attributes for 74AHCT138D-Q100J by NXP Semiconductors

74AHCT138D-Q100J
NXP Semiconductors
-
-
Rohs Code
Yes
Part Life Cycle Code
Transferred
Ihs Manufacturer
NXP SEMICONDUCTORS
Part Package Code
SOP
Package Description
3.90 MM, PLASTIC, MS-012, SOT109-1, SO-16
Pin Count
16
Manufacturer Package Code
SOT109-1
Reach Compliance Code
compliant
Family
AHCT/VHCT/VT
Input Conditioning
STANDARD
JESD-30 Code
R-PDSO-G16
Length
9.9 mm
Load Capacitance (CL)
50 pF
Logic IC Type
3-LINE TO 8-LINE DECODER
Max I(ol)
0.008 A
Number of Functions
1
Number of Terminals
16
Operating Temperature-Max
125 °C
Operating Temperature-Min
-40 °C
Output Polarity
INVERTED
Package Body Material
PLASTIC/EPOXY
Package Code
SOP
Package Equivalence Code
SOP16,.25
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE
Packing Method
TR
Prop. Delay@Nom-Sup
14.5 ns
Propagation Delay (tpd)
14.5 ns
Qualification Status
Not Qualified
Screening Level
AEC-Q100
Seated Height-Max
1.75 mm
Supply Voltage-Max (Vsup)
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
Supply Voltage-Nom (Vsup)
5 V
Surface Mount
YES
Technology
CMOS
Temperature Grade
AUTOMOTIVE
Terminal Form
GULL WING
Terminal Pitch
1.27 mm
Terminal Position
DUAL
Width
3.9 mm
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    NXP Semiconductors
    74AHC(T)138-Q100 - 3-to-8 line decoder/demultiplexer; inverting SOP 16-Pin
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