Z84C4206PEG
vs
Z84C4206PEG
feature comparison
All Stats
Differences Only
Pbfree Code
Rohs Code
Part Life Cycle Code
Transferred
Transferred
Ihs Manufacturer
ZILOG INC
IXYS CORP
Part Package Code
DIP
DIP
Package Description
,
PLASTIC, DIP-40
Pin Count
40
40
Reach Compliance Code
unknown
compliant
HTS Code
8542.31.00.01
8542.31.00.01
JESD-609 Code
e3
e3
Peak Reflow Temperature (Cel)
260
Terminal Finish
MATTE TIN
MATTE TIN
Time@Peak Reflow Temperature-Max (s)
40
uPs/uCs/Peripheral ICs Type
SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches
1
1
Address Bus Width
1
Boundary Scan
NO
Bus Compatibility
Z80
Clock Frequency-Max
6.17 MHz
Communication Protocol
ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC; EXT SYNC
Data Encoding/Decoding Method
NRZ
External Data Bus Width
8
JESD-30 Code
R-PDIP-T40
Length
52.325 mm
Low Power Mode
YES
Number of DMA Channels
Number of I/O Lines
Number of Serial I/Os
2
Number of Terminals
40
On Chip Data RAM Width
Operating Temperature-Max
100 °C
Operating Temperature-Min
-40 °C
Package Body Material
PLASTIC/EPOXY
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE
Qualification Status
Not Qualified
RAM (words)
0
Seated Height-Max
4.75 mm
Supply Current-Max
10 mA
Supply Voltage-Max
5.5 V
Supply Voltage-Min
4.5 V
Supply Voltage-Nom
5 V
Surface Mount
NO
Technology
CMOS
Temperature Grade
INDUSTRIAL
Terminal Form
THROUGH-HOLE
Terminal Pitch
2.54 mm
Terminal Position
DUAL
Width
15.24 mm
Compare Z84C4206PEG with alternatives
Compare Z84C4206PEG with alternatives