XCV50-4CS144I vs XCV50-4CS144C feature comparison

XCV50-4CS144I AMD Xilinx

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XCV50-4CS144C AMD Xilinx

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Pbfree Code No No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code BGA BGA
Package Description CSP-144 CSP-144
Pin Count 144 144
Reach Compliance Code not_compliant not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Clock Frequency-Max 250 MHz 250 MHz
Combinatorial Delay of a CLB-Max 0.8 ns 0.8 ns
JESD-30 Code S-PBGA-B144 S-PBGA-B144
JESD-609 Code e0 e0
Length 12 mm 12 mm
Moisture Sensitivity Level 3 3
Number of CLBs 384 384
Number of Equivalent Gates 57906 57906
Number of Inputs 94 94
Number of Logic Cells 1728 1728
Number of Outputs 94 94
Number of Terminals 144 144
Operating Temperature-Max 100 °C 85 °C
Operating Temperature-Min -40 °C
Organization 384 CLBS, 57906 GATES 384 CLBS, 57906 GATES
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TFBGA TFBGA
Package Equivalence Code BGA144,13X13,32 BGA144,13X13,32
Package Shape SQUARE SQUARE
Package Style GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Cel) 240 240
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.2 mm 1.2 mm
Supply Voltage-Max 2.625 V 2.625 V
Supply Voltage-Min 2.375 V 2.375 V
Supply Voltage-Nom 2.5 V 2.5 V
Surface Mount YES YES
Technology CMOS CMOS
Terminal Finish Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37)
Terminal Form BALL BALL
Terminal Pitch 0.8 mm 0.8 mm
Terminal Position BOTTOM BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 30
Width 12 mm 12 mm
Base Number Matches 1 1
Temperature Grade OTHER

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