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XCV1000E-7BGG560I vs XCV1000E-6BG560I feature comparison

XCV1000E-7BGG560I AMD Xilinx

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XCV1000E-6BG560I AMD Xilinx

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Pbfree Code Yes No
Rohs Code Yes No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code BGA BGA
Package Description BGA-560 BGA-560
Pin Count 560 560
Reach Compliance Code unknown not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Clock Frequency-Max 400 MHz 357 MHz
Combinatorial Delay of a CLB-Max 0.42 ns 0.47 ns
JESD-30 Code S-PBGA-B560 S-PBGA-B560
JESD-609 Code e1 e0
Length 42.5 mm 42.5 mm
Moisture Sensitivity Level 3 3
Number of CLBs 6144 6144
Number of Equivalent Gates 331776 331776
Number of Inputs 404 404
Number of Logic Cells 27648 27648
Number of Outputs 404 404
Number of Terminals 560 560
Operating Temperature-Max 100 °C 100 °C
Operating Temperature-Min -40 °C -40 °C
Organization 6144 CLBS, 331776 GATES 6144 CLBS, 331776 GATES
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code LBGA LBGA
Package Equivalence Code BGA560,33X33,50 BGA560,33X33,50
Package Shape SQUARE SQUARE
Package Style GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE
Peak Reflow Temperature (Cel) 260 225
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.7 mm 1.7 mm
Supply Voltage-Max 1.89 V 1.89 V
Supply Voltage-Min 1.71 V 1.71 V
Supply Voltage-Nom 1.8 V 1.8 V
Surface Mount YES YES
Technology CMOS CMOS
Terminal Finish Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) Tin/Lead (Sn63Pb37)
Terminal Form BALL BALL
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position BOTTOM BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 30
Width 42.5 mm 42.5 mm
Base Number Matches 1 1
ECCN Code 3A991.D
Programmable Logic » Field Programmable Gate Arrays
Programmable Logic » Field Programmable Gate Arrays

Compare XCV1000E-7BGG560I with alternatives

Compare XCV1000E-6BG560I with alternatives