XC9572XL-7CS48C vs XC9572XV-5CS48C feature comparison

XC9572XL-7CS48C AMD Xilinx

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XC9572XV-5CS48C AMD Xilinx

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Pbfree Code No
Rohs Code No No
Part Life Cycle Code Transferred Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code BGA BGA
Package Description CSP-48 CSP-48
Pin Count 48 48
Reach Compliance Code not_compliant not_compliant
ECCN Code EAR99
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 72 MACROCELLS YES
Clock Frequency-Max 125 MHz 222 MHz
In-System Programmable YES YES
JESD-30 Code S-PBGA-B48 S-PBGA-B48
JESD-609 Code e0 e0
JTAG BST YES YES
Length 7 mm 7 mm
Moisture Sensitivity Level 3 3
Number of Dedicated Inputs
Number of I/O Lines 38 38
Number of Inputs 38
Number of Macro Cells 72 72
Number of Outputs 38
Number of Terminals 48 48
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 0 DEDICATED INPUTS, 38 I/O 0 DEDICATED INPUTS, 38 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code FBGA FBGA
Package Equivalence Code BGA48,7X7,32 BGA48,7X7,32
Package Shape SQUARE SQUARE
Package Style GRID ARRAY, FINE PITCH GRID ARRAY, FINE PITCH
Peak Reflow Temperature (Cel) 240 240
Programmable Logic Type FLASH PLD FLASH PLD
Propagation Delay 7.5 ns 5 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.8 mm 1.8 mm
Supply Voltage-Max 3.6 V 2.62 V
Supply Voltage-Min 3 V 2.37 V
Supply Voltage-Nom 3.3 V 2.5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish TIN LEAD Tin/Lead (Sn63Pb37)
Terminal Form BALL BALL
Terminal Pitch 0.8 mm 0.8 mm
Terminal Position BOTTOM BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 30
Width 7 mm 7 mm
Base Number Matches 2 1

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