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XC4052XL-1BGG560I vs XC4052XL-3BG560I feature comparison

XC4052XL-1BGG560I AMD Xilinx

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XC4052XL-3BG560I AMD Xilinx

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Rohs Code Yes No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code BGA BGA
Package Description LBGA, PLASTIC, BGA-560
Pin Count 560 560
Reach Compliance Code compliant not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature MAX USABLE 52000 LOGIC GATES MAX USABLE 52000 LOGIC GATES
Clock Frequency-Max 200 MHz 166 MHz
Combinatorial Delay of a CLB-Max 1.3 ns 1.6 ns
JESD-30 Code S-PBGA-B560 S-PBGA-B560
JESD-609 Code e1 e0
Length 42.5 mm 42.5 mm
Moisture Sensitivity Level 3 3
Number of CLBs 1936 1936
Number of Equivalent Gates 33000 33000
Number of Inputs 352 352
Number of Outputs 352 352
Number of Terminals 560 560
Operating Temperature-Max 100 °C 100 °C
Operating Temperature-Min -40 °C -40 °C
Organization 1936 CLBS, 33000 GATES 1936 CLBS, 33000 GATES
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code LBGA LBGA
Package Shape SQUARE SQUARE
Package Style GRID ARRAY, LOW PROFILE GRID ARRAY, LOW PROFILE
Peak Reflow Temperature (Cel) 260 225
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.7 mm 1.7 mm
Supply Voltage-Max 3.6 V 3.6 V
Supply Voltage-Min 3 V 3 V
Supply Voltage-Nom 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Terminal Finish TIN SILVER COPPER Tin/Lead (Sn63Pb37)
Terminal Form BALL BALL
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position BOTTOM BOTTOM
Time@Peak Reflow Temperature-Max (s) 30 30
Width 42.5 mm 42.5 mm
Base Number Matches 1 1
Number of Logic Cells 1936
Package Equivalence Code BGA560,33X33,50
Programmable Logic » Field Programmable Gate Arrays
Programmable Logic » Field Programmable Gate Arrays

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