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XC4025E-2HQG240C vs XC4025E-1HQ240C feature comparison

XC4025E-2HQG240C AMD Xilinx

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XC4025E-1HQ240C AMD Xilinx

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code QFP QFP
Package Description HFQFP, HEAT SINK, QFP-240
Pin Count 240 240
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature MAX USABLE 25000 LOGIC GATES TYPICAL GATES = 15000-45000
Clock Frequency-Max 125 MHz 166 MHz
Combinatorial Delay of a CLB-Max 1.6 ns
JESD-30 Code S-PQFP-G240 S-PQFP-G240
Length 32 mm 32 mm
Number of CLBs 1024 1024
Number of Equivalent Gates 15000 15000
Number of Terminals 240 240
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min
Organization 1024 CLBS, 15000 GATES 1024 CLBS, 15000 GATES
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code HFQFP HFQFP
Package Shape SQUARE SQUARE
Package Style FLATPACK, HEAT SINK/SLUG, FINE PITCH FLATPACK, HEAT SINK/SLUG, FINE PITCH
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.1 mm 4.1 mm
Supply Voltage-Max 5.25 V
Supply Voltage-Min 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade OTHER OTHER
Terminal Form GULL WING GULL WING
Terminal Pitch 0.5 mm 0.5 mm
Terminal Position QUAD QUAD
Width 32 mm 32 mm
Base Number Matches 1 1
Rohs Code No
JESD-609 Code e0
Moisture Sensitivity Level 3
Number of Inputs 256
Number of Logic Cells 1024
Number of Outputs 256
Package Equivalence Code HQFP240,1.37SQ,20
Peak Reflow Temperature (Cel) 225
Terminal Finish TIN LEAD
Time@Peak Reflow Temperature-Max (s) 30
Programmable Logic » Field Programmable Gate Arrays
Programmable Logic » Field Programmable Gate Arrays

Compare XC4025E-2HQG240C with alternatives

Compare XC4025E-1HQ240C with alternatives