XC4020-5PG223I vs XC4020E-3PG223C feature comparison

XC4020-5PG223I AMD Xilinx

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XC4020E-3PG223C AMD Xilinx

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code PGA PGA
Package Description PGA, PGA223,18X18 HPGA, PGA223,18X18
Pin Count 223 223
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 2016 FLIP-FLOPS; TYP. GATES = 16000-20000 MAX USABLE 20000 LOGIC GATES
Clock Frequency-Max 133.3 MHz 125 MHz
Combinatorial Delay of a CLB-Max 4.5 ns 2 ns
JESD-30 Code S-CPGA-P223 S-CPGA-P223
Length 47.244 mm 47.244 mm
Moisture Sensitivity Level 1 1
Number of CLBs 784 784
Number of Equivalent Gates 16000 13000
Number of Inputs 224 192
Number of Logic Cells 784 784
Number of Outputs 224 192
Number of Terminals 223 223
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C
Organization 784 CLBS, 16000 GATES 784 CLBS, 13000 GATES
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package Code PGA HPGA
Package Equivalence Code PGA223,18X18 PGA223,18X18
Package Shape SQUARE SQUARE
Package Style GRID ARRAY GRID ARRAY, HEAT SINK/SLUG
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.064 mm 4.318 mm
Supply Voltage-Max 5.5 V 5.25 V
Supply Voltage-Min 4.5 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade INDUSTRIAL OTHER
Terminal Form PIN/PEG PIN/PEG
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position PERPENDICULAR PERPENDICULAR
Width 47.244 mm 47.244 mm
Base Number Matches 1 1
Pbfree Code No
JESD-609 Code e0
Terminal Finish TIN LEAD

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