XC2064-50PG68B vs XC2064-50PG68M feature comparison

XC2064-50PG68B AMD Xilinx

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XC2064-50PG68M AMD Xilinx

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Rohs Code Yes Yes
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Reach Compliance Code unknown unknown
ECCN Code 3A001.A.2.C 3A001.A.2.C
HTS Code 8542.39.00.01 8542.39.00.01
Clock Frequency-Max 50 MHz 50 MHz
JESD-30 Code S-XPGA-P68 S-CPGA-P68
Number of Equivalent Gates 600 600
Number of Inputs 58 58
Number of Logic Cells 64 64
Number of Outputs 58 58
Number of Terminals 68 68
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Organization 64 CLBS, 600 GATES 64 CLBS, 600 GATES
Package Body Material CERAMIC CERAMIC, METAL-SEALED COFIRED
Package Code PGA PGA
Package Equivalence Code PGA68,11X11 PGA68,11X11
Package Shape SQUARE SQUARE
Package Style GRID ARRAY GRID ARRAY
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Screening Level 38535Q/M;38534H;883B
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 4.5 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Form PIN/PEG PIN/PEG
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position PERPENDICULAR PERPENDICULAR
Base Number Matches 1 1
Part Package Code PGA
Package Description PGA, PGA68,11X11
Pin Count 68
Additional Feature 122 FLIP-FLOPS; TYP. GATES = 600-1000
Combinatorial Delay of a CLB-Max 15 ns
Length 27.94 mm
Number of CLBs 64
Peak Reflow Temperature (Cel) NOT SPECIFIED
Seated Height-Max 4.064 mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 27.94 mm