XC2018-130PC68C vs XC2018-50PC68I feature comparison

XC2018-130PC68C AMD Xilinx

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XC2018-50PC68I AMD Xilinx

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code LCC LCC
Package Description QCCJ, LDCC68,1.0SQ QCCJ, LDCC68,1.0SQ
Pin Count 68 68
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 174 FLIP-FLOPS; TYP. GATES = 1000-1500 MAX. 74 I/OS; 174 FLIP-FLOPS; TYP. GATES = 1000 - 1500
Clock Frequency-Max 130 MHz 50 MHz
Combinatorial Delay of a CLB-Max 5.5 ns 15 ns
JESD-30 Code S-PQCC-J68 S-PQCC-J68
Length 24.2316 mm 24.2316 mm
Moisture Sensitivity Level 1 1
Number of CLBs 100 100
Number of Equivalent Gates 1000 1000
Number of Inputs 58 58
Number of Logic Cells 100 100
Number of Outputs 58 58
Number of Terminals 68 68
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C
Organization 100 CLBS, 1000 GATES 100 CLBS, 1000 GATES
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code QCCJ QCCJ
Package Equivalence Code LDCC68,1.0SQ LDCC68,1.0SQ
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER CHIP CARRIER
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.445 mm 4.445 mm
Supply Voltage-Max 5.25 V 5.5 V
Supply Voltage-Min 4.75 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade OTHER INDUSTRIAL
Terminal Form J BEND J BEND
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position QUAD QUAD
Width 24.2316 mm 24.2316 mm
Base Number Matches 1 1
JESD-609 Code e0
Terminal Finish TIN LEAD

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Compare XC2018-50PC68I with alternatives