XC17128D-PD8I vs XC1765D-PD8I feature comparison

XC17128D-PD8I AMD Xilinx

Buy Now Datasheet

XC1765D-PD8I AMD Xilinx

Buy Now Datasheet
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer XILINX INC XILINX INC
Part Package Code DIP DIP
Package Description DIP, DIP8,.3 DIP, DIP8,.3
Pin Count 8 8
Reach Compliance Code compliant compliant
Additional Feature USED FOR STORING THE CONFIGURATION BITSTREAMS OF XILINX FPGAS USED FOR STORING THE CONFIGURATION BITSTREAMS OF XILINX FPGAS
Clock Frequency-Max (fCLK) 12.5 MHz 5 MHz
I/O Type COMMON COMMON
JESD-30 Code R-PDIP-T8 R-PDIP-T8
JESD-609 Code e0 e0
Length 9.3599 mm 9.3599 mm
Memory Density 131072 bit 65536 bit
Memory IC Type CONFIGURATION MEMORY CONFIGURATION MEMORY
Memory Width 1 1
Moisture Sensitivity Level 1 1
Number of Functions 1 1
Number of Terminals 8 8
Number of Words 131072 words 65536 words
Number of Words Code 128000 64000
Operating Mode SYNCHRONOUS SYNCHRONOUS
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Organization 128KX1 64KX1
Output Characteristics 3-STATE 3-STATE
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP8,.3 DIP8,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial SERIAL SERIAL
Power Supplies 5 V 5 V
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.5974 mm 4.5974 mm
Standby Current-Max 0.00005 A 0.0015 A
Supply Current-Max 0.01 mA 0.01 mA
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Finish Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 1
Peak Reflow Temperature (Cel) 225
Time@Peak Reflow Temperature-Max (s) 30

Compare XC17128D-PD8I with alternatives

Compare XC1765D-PD8I with alternatives