UPD421001V-12
vs
UPD421002V-12
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
RENESAS ELECTRONICS CORP
RENESAS ELECTRONICS CORP
Part Package Code
ZIP
ZIP
Package Description
ZIP,
ZIP,
Pin Count
20
20
Reach Compliance Code
unknown
unknown
ECCN Code
EAR99
EAR99
HTS Code
8542.32.00.02
8542.32.00.02
Access Mode
NIBBLE
STATIC COLUMN
Access Time-Max
120 ns
120 ns
Additional Feature
RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
JESD-30 Code
R-PZIP-T20
R-PZIP-T20
Memory Density
1048576 bit
1048576 bit
Memory IC Type
NIBBLE MODE DRAM
STATIC COLUMN DRAM
Memory Width
1
1
Number of Functions
1
1
Number of Ports
1
1
Number of Terminals
20
20
Number of Words
1048576 words
1048576 words
Number of Words Code
1000000
1000000
Operating Mode
ASYNCHRONOUS
ASYNCHRONOUS
Operating Temperature-Max
70 °C
70 °C
Operating Temperature-Min
Organization
1MX1
1MX1
Output Characteristics
3-STATE
3-STATE
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
ZIP
ZIP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Qualification Status
Not Qualified
Not Qualified
Refresh Cycles
512
512
Seated Height-Max
10.16 mm
10.16 mm
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL
COMMERCIAL
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
1.27 mm
1.27 mm
Terminal Position
ZIG-ZAG
ZIG-ZAG
Width
2.8 mm
2.8 mm
Base Number Matches
2
2
Compare UPD421001V-12 with alternatives
Compare UPD421002V-12 with alternatives