TC74LVQ240FW(ELP) vs 74LVQ240SC feature comparison

TC74LVQ240FW(ELP) Toshiba America Electronic Components

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74LVQ240SC Fairchild Semiconductor Corporation

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Pbfree Code No
Rohs Code No No
Part Life Cycle Code Active Obsolete
Ihs Manufacturer TOSHIBA CORP FAIRCHILD SEMICONDUCTOR CORP
Part Package Code SOIC SOIC
Package Description SOP, SOP, SOP20,.4
Pin Count 20 20
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature MAX O/P SKEW = 1.5NS; MAX VOLP = 0.8V @ VCC = 3.3V, TA = 25 DEGREE C
Family LVQ LVQ
JESD-30 Code R-PDSO-G20 R-PDSO-G20
Length 12.8 mm 12.8 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type BUS DRIVER BUS DRIVER
Number of Bits 4 4
Number of Functions 2 2
Number of Ports 2 2
Number of Terminals 20 20
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity INVERTED INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Equivalence Code SOP20,.4 SOP20,.4
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Cel) 240
Propagation Delay (tpd) 10.5 ns 15 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 2.7 mm 2.65 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2 V 2 V
Supply Voltage-Nom (Vsup) 3.3 V 2.7 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 7.5 mm 7.5 mm
Base Number Matches 1 2
Control Type ENABLE LOW
JESD-609 Code e0
Max I(ol) 0.012 A
Packing Method TUBE
Prop. Delay@Nom-Sup 10.5 ns
Terminal Finish TIN LEAD

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