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SN74LVC112DR vs 74LVC109D,112 feature comparison

SN74LVC112DR Texas Instruments

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74LVC109D,112 NXP Semiconductors

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer TEXAS INSTRUMENTS INC NXP SEMICONDUCTORS
Part Package Code SOIC SOP
Package Description SOP, PLASTIC, SO-16
Pin Count 16 16
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G16 R-PDSO-G16
Length 9.9 mm 9.9 mm
Logic IC Type J-K FLIP-FLOP J-KBAR FLIP-FLOP
Number of Bits 2 2
Number of Functions 2 2
Number of Terminals 16 16
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Polarity COMPLEMENTARY COMPLEMENTARY
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.75 mm 1.75 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2.7 V 2.7 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Trigger Type NEGATIVE EDGE POSITIVE EDGE
Width 3.9 mm 3.9 mm
Base Number Matches 1 1
Rohs Code Yes
Manufacturer Package Code SOT109-1
JESD-609 Code e4
Load Capacitance (CL) 50 pF
Max Frequency@Nom-Sup 150000000 Hz
Max I(ol) 0.024 A
Moisture Sensitivity Level 1
Package Equivalence Code SOP16,.25
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 7.5 ns
Propagation Delay (tpd) 7.5 ns
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Time@Peak Reflow Temperature-Max (s) 30
fmax-Min 225 MHz
Logic » FF/Latches
Logic » FF/Latches

Compare SN74LVC112DR with alternatives

Compare 74LVC109D,112 with alternatives