SC80C51BAGN40
vs
LD80C51FA-1
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
NXP SEMICONDUCTORS
INTEL CORP
Package Description
DIP,
DIP, DIP40,.6
Reach Compliance Code
unknown
unknown
HTS Code
8542.31.00.01
8542.31.00.01
Has ADC
NO
NO
Address Bus Width
16
16
Bit Size
8
8
Boundary Scan
NO
NO
Clock Frequency-Max
16 MHz
16 MHz
DAC Channels
NO
NO
DMA Channels
NO
NO
External Data Bus Width
8
8
Format
FIXED POINT
FIXED POINT
Integrated Cache
NO
NO
JESD-30 Code
R-PDIP-T40
R-GDIP-T40
Length
52 mm
52.325 mm
Low Power Mode
YES
YES
Number of DMA Channels
Number of External Interrupts
2
2
Number of I/O Lines
32
32
Number of Serial I/Os
1
1
Number of Terminals
40
40
Number of Timers
2
3
On Chip Data RAM Width
8
8
On Chip Program ROM Width
8
Operating Temperature-Max
85 °C
85 °C
Operating Temperature-Min
-40 °C
-40 °C
PWM Channels
NO
NO
Package Body Material
PLASTIC/EPOXY
CERAMIC, GLASS-SEALED
Package Code
DIP
DIP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Qualification Status
Not Qualified
Not Qualified
RAM (words)
128
256
ROM (words)
4096
0
ROM Programmability
OTPROM
ROM LESS
Seated Height-Max
4.7 mm
5.72 mm
Speed
8 MHz
16 MHz
Supply Current-Max
24.78 mA
38 mA
Supply Voltage-Max
6 V
6 V
Supply Voltage-Min
5 V
4 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
INDUSTRIAL
INDUSTRIAL
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Width
15.24 mm
15.24 mm
uPs/uCs/Peripheral ICs Type
MICROCONTROLLER
MICROCONTROLLER
Base Number Matches
3
1
Rohs Code
No
Part Package Code
DIP
Pin Count
40
Additional Feature
BOOLEAN PROCESSOR; ON-CIRCUIT EMULATION
CPU Family
8051
JESD-609 Code
e0
Package Equivalence Code
DIP40,.6
RAM (bytes)
256
Terminal Finish
Tin/Lead (Sn/Pb)
Compare SC80C51BAGN40 with alternatives
Compare LD80C51FA-1 with alternatives