S71PL064JA0BFW0Z0
vs
S71PL064JA0BAI0Z3
feature comparison
| Rohs Code |
Yes
|
Yes
|
| Part Life Cycle Code |
Obsolete
|
Obsolete
|
| Ihs Manufacturer |
ADVANCED MICRO DEVICES INC
|
SPANSION INC
|
| Reach Compliance Code |
compliant
|
compliant
|
| ECCN Code |
EAR99
|
EAR99
|
| HTS Code |
8542.32.00.71
|
8542.32.00.71
|
| Access Time-Max |
70 ns
|
70 ns
|
| JESD-30 Code |
S-PBGA-B56
|
R-PBGA-B56
|
| Memory IC Type |
MEMORY CIRCUIT
|
MEMORY CIRCUIT
|
| Mixed Memory Type |
FLASH+PSRAM
|
FLASH+PSRAM
|
| Number of Terminals |
56
|
56
|
| Operating Temperature-Max |
85 °C
|
85 °C
|
| Operating Temperature-Min |
-25 °C
|
-40 °C
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
FBGA
|
TFBGA
|
| Package Equivalence Code |
BGA56,8X8,32
|
BGA56,8X8,32
|
| Package Shape |
SQUARE
|
RECTANGULAR
|
| Package Style |
GRID ARRAY, FINE PITCH
|
GRID ARRAY, THIN PROFILE, FINE PITCH
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Standby Current-Max |
0.000005 A
|
0.000005 A
|
| Supply Current-Max |
0.07 mA
|
0.07 mA
|
| Supply Voltage-Nom (Vsup) |
3 V
|
3 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
OTHER
|
INDUSTRIAL
|
| Terminal Form |
BALL
|
BALL
|
| Terminal Pitch |
0.8 mm
|
0.8 mm
|
| Terminal Position |
BOTTOM
|
BOTTOM
|
| Base Number Matches |
2
|
3
|
| Part Package Code |
|
BGA
|
| Package Description |
|
TFBGA, BGA56,8X8,32
|
| Pin Count |
|
56
|
| Additional Feature |
|
PSRAM IS ORGANIZED AS 1M X 16
|
| Length |
|
9 mm
|
| Memory Density |
|
67108864 bit
|
| Memory Width |
|
16
|
| Number of Functions |
|
1
|
| Number of Words |
|
4194304 words
|
| Number of Words Code |
|
4000000
|
| Operating Mode |
|
ASYNCHRONOUS
|
| Organization |
|
4MX16
|
| Peak Reflow Temperature (Cel) |
|
NOT SPECIFIED
|
| Seated Height-Max |
|
1.2 mm
|
| Supply Voltage-Max (Vsup) |
|
3.6 V
|
| Supply Voltage-Min (Vsup) |
|
2.7 V
|
| Time@Peak Reflow Temperature-Max (s) |
|
NOT SPECIFIED
|
| Width |
|
7 mm
|
|
|
|
Compare S71PL064JA0BAI0Z3 with alternatives