S71GL032NA0BHW0U0
vs
S71GL032NA0BHW0U3
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Transferred
Transferred
Ihs Manufacturer
CYPRESS SEMICONDUCTOR CORP
CYPRESS SEMICONDUCTOR CORP
Package Description
7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, HALOGEN FREE, FBGA-56
7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, HALOGEN FREE, FBGA-56
Reach Compliance Code
compliant
compliant
ECCN Code
EAR99
EAR99
HTS Code
8542.32.00.71
8542.32.00.71
Access Time-Max
90 ns
90 ns
Additional Feature
PSRAM IS ORGANIZED AS 1M X 16
PSRAM IS ORGANIZED AS 1M X 16
JESD-30 Code
R-PBGA-B56
R-PBGA-B56
JESD-609 Code
e1
e1
Length
9 mm
9 mm
Memory Density
33554432 bit
33554432 bit
Memory IC Type
MEMORY CIRCUIT
MEMORY CIRCUIT
Memory Width
16
16
Mixed Memory Type
FLASH+SRAM
FLASH+SRAM
Moisture Sensitivity Level
3
3
Number of Functions
1
1
Number of Terminals
56
56
Number of Words
2097152 words
2097152 words
Number of Words Code
2000000
2000000
Operating Mode
ASYNCHRONOUS
ASYNCHRONOUS
Operating Temperature-Max
85 °C
85 °C
Operating Temperature-Min
-25 °C
-25 °C
Organization
2MX16
2MX16
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
TFBGA
TFBGA
Package Equivalence Code
BGA56,8X8,32
BGA56,8X8,32
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
GRID ARRAY, THIN PROFILE, FINE PITCH
GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Cel)
260
260
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
1.2 mm
1.2 mm
Supply Voltage-Max (Vsup)
3.1 V
3.1 V
Supply Voltage-Min (Vsup)
2.7 V
2.7 V
Supply Voltage-Nom (Vsup)
3 V
3 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
OTHER
OTHER
Terminal Finish
TIN SILVER COPPER
TIN SILVER COPPER
Terminal Form
BALL
BALL
Terminal Pitch
0.8 mm
0.8 mm
Terminal Position
BOTTOM
BOTTOM
Time@Peak Reflow Temperature-Max (s)
40
40
Width
7 mm
7 mm
Base Number Matches
1
1
Compare S71GL032NA0BHW0U0 with alternatives
Compare S71GL032NA0BHW0U3 with alternatives