R80C52UFXXX-40 vs D80C52UFXXX-40 feature comparison

R80C52UFXXX-40 Matra MHS

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D80C52UFXXX-40 Matra MHS

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer MATRA MHS MATRA MHS
Reach Compliance Code unknown unknown
ECCN Code 3A991.A.2 3A991.A.2
HTS Code 8542.31.00.01 8542.31.00.01
Has ADC NO NO
Additional Feature BOOLEAN PROCESSOR; ROM PROTECT BOOLEAN PROCESSOR; ROM PROTECT
Address Bus Width 16 16
Bit Size 8 8
Boundary Scan NO NO
Clock Frequency-Max 40 MHz 40 MHz
DAC Channels NO NO
DMA Channels NO NO
External Data Bus Width 8 8
Format FIXED POINT FIXED POINT
Integrated Cache NO NO
JESD-30 Code S-CQCC-N44 R-GDIP-T40
Low Power Mode YES YES
Number of DMA Channels
Number of External Interrupts 2 2
Number of I/O Lines 32 32
Number of Serial I/Os 1 1
Number of Terminals 44 40
Number of Timers 3 3
On Chip Data RAM Width 8 8
On Chip Program ROM Width 8 8
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
PWM Channels NO NO
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED
Package Shape SQUARE RECTANGULAR
Package Style CHIP CARRIER IN-LINE
Qualification Status Not Qualified Not Qualified
RAM (words) 256 256
ROM (words) 8192 8192
ROM Programmability MROM MROM
Speed 40 MHz 40 MHz
Supply Current-Max 59 mA 59 mA
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 5 V 5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Form NO LEAD THROUGH-HOLE
Terminal Position QUAD DUAL
uPs/uCs/Peripheral ICs Type MICROCONTROLLER MICROCONTROLLER
Base Number Matches 3 2

Compare R80C52UFXXX-40 with alternatives

Compare D80C52UFXXX-40 with alternatives