QR80C51XXX-S vs QR80C52FXXX-S feature comparison

QR80C51XXX-S Matra MHS

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QR80C52FXXX-S Matra MHS

Buy Now Datasheet
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer MATRA MHS MATRA MHS
Reach Compliance Code unknown unknown
HTS Code 8542.31.00.01 8542.31.00.01
Has ADC NO NO
Additional Feature BOOLEAN PROCESSOR BOOLEAN PROCESSOR; ROM PROTECT
Address Bus Width 16 16
Bit Size 8 8
Boundary Scan NO NO
Clock Frequency-Max 20 MHz 20 MHz
DAC Channels NO NO
DMA Channels NO NO
External Data Bus Width 8 8
Format FIXED POINT FIXED POINT
Integrated Cache NO NO
JESD-30 Code S-CQCC-N44 S-CQCC-N44
Low Power Mode YES YES
Number of DMA Channels
Number of External Interrupts 2 2
Number of I/O Lines 32 32
Number of Serial I/Os 1 1
Number of Terminals 44 44
Number of Timers 2 3
On Chip Data RAM Width 8 8
On Chip Program ROM Width 8 8
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
PWM Channels NO NO
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package Code QCCN QCCN
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER CHIP CARRIER
Qualification Status Not Qualified Not Qualified
RAM (words) 128 256
ROM (words) 4096 8192
ROM Programmability MROM MROM
Speed 20 MHz 20 MHz
Supply Current-Max 32 mA 34 mA
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 5 V 5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Form NO LEAD NO LEAD
Terminal Position QUAD QUAD
uPs/uCs/Peripheral ICs Type MICROCONTROLLER MICROCONTROLLER
Base Number Matches 1 1

Compare QR80C51XXX-S with alternatives

Compare QR80C52FXXX-S with alternatives