PLDC18G8-15PC vs EP320PI-2 feature comparison

PLDC18G8-15PC Cypress Semiconductor

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EP320PI-2 Altera Corporation

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer CYPRESS SEMICONDUCTOR CORP ALTERA CORP
Part Package Code DIP DIP
Package Description 0.300 INCH, PLASTIC, DIP-20 DIP, DIP20,.3
Pin Count 20 20
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature PAL WITH MACROCELLS; 8 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK 8 MACROCELLS; SHARED INPUT/CLOCK
Architecture PAL-TYPE PAL-TYPE
Clock Frequency-Max 41.6 MHz 40 MHz
JESD-30 Code R-PDIP-T20 R-PDIP-T20
JESD-609 Code e0 e0
Length 25.527 mm 26.162 mm
Number of Dedicated Inputs 8 9
Number of I/O Lines 8 8
Number of Inputs 18 18
Number of Outputs 8 8
Number of Product Terms 72 72
Number of Terminals 20 20
Operating Temperature-Max 75 °C 85 °C
Operating Temperature-Min -40 °C
Organization 8 DEDICATED INPUTS, 8 I/O 9 DEDICATED INPUTS, 8 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP20,.3 DIP20,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Programmable Logic Type OT PLD OT PLD
Propagation Delay 15 ns 35 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.826 mm
Supply Voltage-Max 5.25 V 5.5 V
Supply Voltage-Min 4.75 V 4.5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL EXTENDED INDUSTRIAL
Terminal Finish Tin/Lead (Sn/Pb) TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 1
Pbfree Code No
Peak Reflow Temperature (Cel) 220

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