PHD21N06LT
vs
HUF76419D3S
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Obsolete
Transferred
Ihs Manufacturer
NEXPERIA
INTERSIL CORP
Package Description
DPAK-3
SMALL OUTLINE, R-PSSO-G2
Reach Compliance Code
compliant
not_compliant
ECCN Code
EAR99
EAR99
Date Of Intro
2017-02-01
Additional Feature
LOGIC LEVEL COMPATIBLE
Avalanche Energy Rating (Eas)
34 mJ
Case Connection
DRAIN
DRAIN
Configuration
SINGLE WITH BUILT-IN DIODE
SINGLE WITH BUILT-IN DIODE
DS Breakdown Voltage-Min
55 V
60 V
Drain Current-Max (ID)
19 A
20 A
Drain-source On Resistance-Max
0.075 Ω
0.043 Ω
FET Technology
METAL-OXIDE SEMICONDUCTOR
METAL-OXIDE SEMICONDUCTOR
JESD-30 Code
R-PSSO-G2
R-PSSO-G2
JESD-609 Code
e3
e0
Moisture Sensitivity Level
1
Number of Elements
1
1
Number of Terminals
2
2
Operating Mode
ENHANCEMENT MODE
ENHANCEMENT MODE
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE
SMALL OUTLINE
Polarity/Channel Type
N-CHANNEL
N-CHANNEL
Pulsed Drain Current-Max (IDM)
76 A
Surface Mount
YES
YES
Terminal Finish
TIN
Tin/Lead (Sn/Pb)
Terminal Form
GULL WING
GULL WING
Terminal Position
SINGLE
SINGLE
Transistor Application
SWITCHING
SWITCHING
Transistor Element Material
SILICON
SILICON
Base Number Matches
3
2
JEDEC-95 Code
TO-252AA
Operating Temperature-Max
175 °C
Power Dissipation-Max (Abs)
80 W
Qualification Status
Not Qualified
Compare PHD21N06LT with alternatives
Compare HUF76419D3S with alternatives