PHB21N06LT/T3
vs
PHB21N06LTT/R
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Transferred
Active
Ihs Manufacturer
NXP SEMICONDUCTORS
NEXPERIA
Package Description
SMALL OUTLINE, R-PSSO-G2
D2PAK-3
Pin Count
3
Reach Compliance Code
unknown
not_compliant
ECCN Code
EAR99
EAR99
Additional Feature
LOGIC LEVEL COMPATIBLE
LOGIC LEVEL COMPATIBLE
Avalanche Energy Rating (Eas)
34 mJ
34 mJ
Case Connection
DRAIN
DRAIN
Configuration
SINGLE WITH BUILT-IN DIODE
SINGLE WITH BUILT-IN DIODE
DS Breakdown Voltage-Min
55 V
55 V
Drain Current-Max (ID)
19 A
19 A
Drain-source On Resistance-Max
0.075 Ω
0.075 Ω
FET Technology
METAL-OXIDE SEMICONDUCTOR
METAL-OXIDE SEMICONDUCTOR
JESD-30 Code
R-PSSO-G2
R-PSSO-G2
Number of Elements
1
1
Number of Terminals
2
2
Operating Mode
ENHANCEMENT MODE
ENHANCEMENT MODE
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE
SMALL OUTLINE
Polarity/Channel Type
N-CHANNEL
N-CHANNEL
Pulsed Drain Current-Max (IDM)
76 A
76 A
Qualification Status
Not Qualified
Surface Mount
YES
YES
Terminal Form
GULL WING
GULL WING
Terminal Position
SINGLE
SINGLE
Transistor Application
SWITCHING
SWITCHING
Transistor Element Material
SILICON
SILICON
Base Number Matches
2
3
Rohs Code
Date Of Intro
2017-02-01
JESD-609 Code
e3
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
245
Terminal Finish
TIN
Time@Peak Reflow Temperature-Max (s)
30
Compare PHB21N06LT/T3 with alternatives
Compare PHB21N06LTT/R with alternatives