PEEL22LV10AZP-25L vs PEEL22LV10AZP-25 feature comparison

PEEL22LV10AZP-25L Integrated Circuit Technology Corp

Buy Now Datasheet

PEEL22LV10AZP-25 Integrated Circuit Technology Corp

Buy Now Datasheet
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer INTEGRATED CIRCUIT TECHNOLOGY CORP INTEGRATED CIRCUIT TECHNOLOGY CORP
Part Package Code DIP DIP
Package Description DIP, DIP, DIP24,.3
Pin Count 24 24
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK 10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Clock Frequency-Max 25 MHz 25 MHz
JESD-30 Code R-PDIP-T24 R-PDIP-T24
Length 31.75 mm 31.75 mm
Number of Dedicated Inputs 11 11
Number of I/O Lines 10 10
Number of Terminals 24 24
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP24,.3 DIP24,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Programmable Logic Type EE PLD EE PLD
Propagation Delay 25 ns 25 ns
Qualification Status Not Qualified Not Qualified
Supply Voltage-Max 3.6 V 3.6 V
Supply Voltage-Min 2.7 V 2.7 V
Supply Voltage-Nom 3 V 3 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 2
Rohs Code No
Architecture PAL-TYPE
JESD-609 Code e0
Number of Inputs 22
Number of Outputs 10
Number of Product Terms 133
Terminal Finish Tin/Lead (Sn/Pb)