PDTD114ET-T vs PUMB17 feature comparison

PDTD114ET-T NXP Semiconductors

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PUMB17 NXP Semiconductors

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Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer NXP SEMICONDUCTORS NXP SEMICONDUCTORS
Package Description SMALL OUTLINE, R-PDSO-G3 PLASTIC, SC-88, 6 PIN
Reach Compliance Code unknown compliant
ECCN Code EAR99 EAR99
Additional Feature BUILT IN BIAS RESISTOR RATIO IS 1 BUILT IN BIAS RESISTOR RATIO IS 0.47
Collector Current-Max (IC) 0.5 A 0.1 A
Collector-Base Capacitance-Max 8 pF
Collector-Emitter Voltage-Max 50 V 50 V
Configuration SINGLE WITH BUILT-IN RESISTOR SEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
DC Current Gain-Min (hFE) 56 60
JESD-30 Code R-PDSO-G3 R-PDSO-G6
Number of Elements 1 2
Number of Terminals 3 6
Operating Temperature-Max 150 °C 150 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Polarity/Channel Type NPN PNP
Qualification Status Not Qualified Not Qualified
Surface Mount YES YES
Terminal Form GULL WING GULL WING
Terminal Position DUAL DUAL
Transistor Application SWITCHING SWITCHING
Transistor Element Material SILICON SILICON
Transition Frequency-Nom (fT) 100 MHz
VCEsat-Max 0.3 V
Base Number Matches 1 3
Pbfree Code Yes
Rohs Code Yes
Part Package Code SC-88
Pin Count 6
JESD-609 Code e3
Moisture Sensitivity Level 1
Peak Reflow Temperature (Cel) 260
Power Dissipation-Max (Abs) 0.3 W
Terminal Finish Tin (Sn)
Time@Peak Reflow Temperature-Max (s) 30

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